Table 2.3 Single Chip Mode; Table 2.4 Single Boot Mode - Toshiba TXZ+ TMPM4MNFYAFG Reference Manual

32-bit risc microcontroller, clock control and operation mode
Table of Contents

Advertisement

(2) TMPM4MxFWA
Single chip mode
-
Start
Address
0x00000000
Code Flash
0x00020000
Reserved
0x00040000
Fault
0x20000000
RAM0
0x20002000
RAM1
0x20004000
RAM2
0x20006000
Fault
0x22000000
Bit band alias
0x24000000
Fault
0x30000000
Data Flash
0x30008000
Fault
0x3F7F8000
Boot ROM
0x3F7F9800
Fault
For the address of this area, refer to Table "
0x5E000000
Code Flash (Mirror)
: Accessible, -: not accessible, Fault:
Single boot mode
-
Start
Address
0x00000000
Boot ROM
0x00001800
Fault
0x20000000
RAM0
0x20002000
RAM1
0x20004000
RAM2
0x20006000
Fault
0x22000000
Bit band alias
0x24000000
Fault
0x30000000
Data Flash
0x30008000
Fault
Boot ROM
0x3F7F8000
(Mirror)
0x3F7F9800
Fault
For the address of this area, refer to Table "
0x5E000000
Code Flash (Mirror)
: Accessible, -: not accessible, Fault:

Table 2.3 Single chip mode

Sub master
Slave
DMAC
SS0
M0
Fault
M1
Fault
-
-
-
Fault
M5
M6
SM1
-
Fault
-
-
Fault
M3
-
Fault
M4
Fault
-
Fault
M2
Fault
Fault is caused

Table 2.4 Single boot mode

Sub master
Slave
DMAC
SS0
M4
Fault
-
Fault
M5
M6
SM1
-
Fault
-
Fault
-
Fault
M3
-
Fault
M4
Fault
-
Fault
M2
Fault
Fault is caused
Clock Control and Operation Mode
Core
NBDIF
S-Bus
SS1
S1
Fault
-
Fault
-
-
-
Fault
-
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Table 2.5 Connection of peripheral function
Fault
Core
NBDIF
S-Bus
SS1
S1
Fault
-
Fault
-
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Table 2.5 Connection of peripheral function
Fault
50 / 64
TXZ+ Family
TMPM4M Group(1)
Main master
Core
Core
D-Bus
I-Bus
S2
S3
Fault
Fault
-
-
Fault
Fault
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
".
-
-
Main master
Core
Core
D-Bus
I-Bus
S2
S3
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
".
-
-
2022-06-24
Rev. 1.1

Advertisement

Table of Contents
loading

This manual is also suitable for:

Cg-m4m(1)-e

Table of Contents