MN002465A01-AN
Chapter 2 : Overview
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Transmitter
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Receiver
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Frequency Generating
2.3.1
Digital Section
The digital section is based on a Dual Core System On a Chip (SoC) processor. It consists of a
low-power Advanced RISC Machine (ARM) application core and Digital Signal Processor (DSP) core
with floating point. This section also has a coprocessor that does keypad scanning and several input or
output (IO) interfaces.
The dual-core architecture of the Dual Core Processor SoC provides benefits of both DSP and
Reduced Instruction Set Computing (RISC) technologies.
The DSP performs modulation and de-modulation functions for the radio. It also performs Forward
Error Correction and other correction algorithms for overcoming channel errors and Algebraic Code
Excited Linear Prediction (ACELP) speech coding. The DSP carries the following function:
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linear 16-bit analog to digital conversions
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audio filtering
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level amplification for the microphone audio input and the received audio output
The power and audio section is based on the Power Management IC. This section includes power
supplies, audio routing, microphone, and earpiece amplifiers. An audio power amplifier that is external
is used for the loudspeaker.
2.3.2
Transmitter Path
The transmitter circuitry includes a linear class AB Power Amplifier (PA) for the TETRA linear
modulation of the terminal. It includes a Cartesian Loop to enhance its transmitter linearity and reduce
splattering power into adjacent channels.
The transmitter path consists of a Cartesian Loop that contains forward and feedback paths. The
forward path includes the following items.
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Tx Power Control Integrated Circuit
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Balanced-Unbalanced Converter (BALUN)
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Forward Attenuator
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Power Amplifier
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Duplexer
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Coupler
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Antenna Switch
The loop feedback path includes the following items.
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Directional Coupler
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Feedback Attenuator
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BALUN
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Tx Power Control Integrated Circuit
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