Yamaha RX-Z1 Service Manual page 64

RX-Z1/DSP-AZ1
IC27 : YSS910-S (DSP P.C.B.)
DSP6 (Digital Audio Processor)
NC
VDD5
DA16
DA17
DA18
DA19
DA20
DA21
DA22
DA23
VSS
DA24
DA25
DA26
DA27
DA28
DA29
DA30
DA31
VDD5
VSS
A00
A01
A02
A03
A04
A05
A06
A07
A08
A09
VSS
VDD
A10
A11
A12
A13
A14
A15/RAS
A16/CAS
A17/CE
/WE
/OE
VDD5
Name I/O
XI
XO
/SYNCI
CKI
/SYNCO
CKO
CKSEL
MCKS
/SSYNC
/IC
/TEST
CD14-00 I/O
CA0/CD15 I/O
CA7-1
BTYP
/CS Is+
/RD Is+
/WR Is+
/IRQ
TRIG I/O
/WAIT
SI7-0
SO7-0
DB31-00 I+/O
TIMO/DBOE I/O
DA31-00 I+/O
A17/CE
A16/CAS
A15/RAS
A14-12
A11-00
/WE
/OE
(N.C.)
VDD5
VDD
VSS
63
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
Function
I System master clock input (60MHz or 30MHz)
O System master clock output (60MHz or 30MHz)
I System synchronous signal input
I System clock input (30MHz)
O System synchronous signal output
O System clock output (30MHz)
I System master clock select (0:60MHz, 1: 30MHz)
I Master clock input for serial I/O (128 x Fs)
I Synchronous signal input for serial I/O
Is Initial clear
I+ Test mode setting (0: Test, 1: Normal)
Host CPU data bus
Host CPU address bus / data bus
I Host CPU address bus
I Host CPU data bus width select (0: 8 bit, 1: 16 bit)
Chip select signal input
Read signal input
Write signal input
O IRQ output
Transfer trigger signal input/output
O WAIT output
I+ Serial data input
O Serial data output
Parallel data bus
Timing signal output / parallel data bus output control input
External memory data bus
O External memory address (SRAM), /CE (PSRAM)
O External memory address (SRAM, PSRAM), /CAS (DRAM)
O External memory address (SRAM, PSRAM), /RAS (DRAM)
O External memory address (SRAM, PSRAM)
O External memory address (SRAM, PSRAM, DRAM)
O External memory Write Enable signal
O External memory Output Enable signal
_
No connection
_
+5V
_
+3.3V
_
Ground
88 VDD
87 VDD5
86 DB12
CPU
85 DB11
84 DB10
INTERFACE
83 DB09
82 DB08
81 DB07
DB06
80
79 DB05
78 DB04
77 DB03
76 DB02
75 DB01
74 DB00
73 VSS
72 SO7
SO6
71
70 SO5
69 SO4
I/O BUS 320 STEP
68 SO3
67 SO2
CONTROL DEQ
66 SO1
65 SO0
64 VDD5
63 VSS
SI7
62
61 SI6
60 SI5
59 SI4
58 SI3
57 SI2
56 SI1
55 SI0
54 VSS
/WAIT
53
52 CD00
51 CD01
SERIAL SERIAL
50 CD02
INPUT OUTPUT
49 CD03
48 CD04
32CH INPUT 32CH OUTPUT
47 CD05
46 VDD5 BUFFER BUFFER
45 VDD
CLOCK
GENERATOR
CTL-BUS
32
DA31~00
320 STEP
DSP 18
A17~00
EXTERNAL
320CH RAM
/WE
INTERFACE
INTERPOLATER
/OE
I/O-BUS
PARALLEL MOD
FUNCTION
IN/OUT 8 BIT/16CH