Yamaha RX-Z1 Service Manual page 86

A B
RX-Z1/DSP-AZ1/DSP-AX1UG
SCHEMATIC DIAGRAM (DSP 2/2)
1
IC22: TC74VHCT00AF
Quad 2-Input Nand Gate
RAM
1A 1 14 Vcc
1B 2 13 4B
1Y 3 12 4A
2A 4 11 4Y
2B 5 10 3B
2Y 6 9 3A
GND 7 8 3Y
IC23, 24, 30, 31, 36, 37, 43,
44, 48, 49: µPC4570G2
2
Dual OP-Amp
OUT 1 +V
1 8 CC
–IN 1 2 7 OUT 2 4.9
+ – + –
0.4
+IN 3 6 –IN
1 2
0.4
–V 4 5 +IN 0.4
CC 2
0.4
0.4
0.4
0.4
0.4
IC52: TC74VHCT08AF
0
Quad 2-Input And Gate
0.4
0.4
1A 1 14 Vcc
0.4
1B 2 13 4B
0.4
3
1Y 3 12 4A
0.4
2A 4 11 4Y
0.4
2B 5 10 3B
0.4
2Y 6 9 3A 0.4
GND 7 8 3Y 4.9
0
~
~
~
~
~
~
~
~
~
0
4
3.2
2.1
2.6
4
4.7
1.7
4.9
3.2
0.1
5
3.2
3.2
0.1
3.2
1.8 ~
0.1
2.3
0
L/R
DIGITAL FILTER
6
L
DAC
7
8
9
103
C D E
# All voltages are measured with a 10MΩ/V DC electric volt meter.
# Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed.
# Schematic diagram is subject to change without notice.
RAM
3.2
4.9
DSP1
0
1.3
~
RC
0
FL/FR
~
0.1
RL/RR
Point 4 Pin 3 of IC27
1.3
C/LFE
2.4
L/R
4.9
0
0
RC
~
LS/RS
0.7
C/LFE
1.3
L/R
0
~
~
~
~
~
~
4.9
3.2
C/RC
DIGITAL FILTER DIGITAL FILTER
CENTER
REAR CENTER
DAC DAC DAC
F G
RAM
4.8
2.9
2.9
2.9
2.9
DSP2
2.9
2.9
3.0
2.9
0
2.9
2.9
2.9
2.9
2.9
2.9
2.9
2.9
4.8
0
2.4
2.4
2.4
2.4
2.4
2.4
2.4
2.4
2.4
0
3.2
3.8
4.1
4.4
4.2
4.8
FL/FR RL/RR
DIGITAL FILTER
FRONT L REAR L
DAC DAC DAC
H I
IC26, 33, 40: MSM514260E-60JS
4Mbit DRAM
Timing
RAS
14
Generator
LCAS 29
UCAS 28
A0~A8
VCC 20
VSS 21
3.2
4.8
3.2
~ ~
0
0
~ 1.5
~
~
RL/RR
0 0
0
FL/FR
1.2
C/RC
1.2 0.8
L/R
4.8
0
1.3
0
RC
0
FL/FR
~
RL/RR
0.1
RL/RR
1.3
C/LFE
2.4
L/R
0
~
~
~
~
~
~
4.9
3.2
DIGITAL FILTER
DAC DAC DAC
J K L
WE OE
13 27
I/O
Controller
Output
8 8
I/O Buffers
Controller
DQ1~DQ8
Column
Address Column Decoders Input
9 9 8
8
Buffers
Buffers
I/O
Internal Sense Amplifiers
Refresh 16 16
Selector
Addess
Control Clock
Counter
Input
8 8
Buffers
Row
Row
9 Address 9
Word Memory DQ9~DQ16
Deco-
Buffers Drivers Cells
ders
Output
8 8
Buffers
On Chip
VBB Generater