Display Board - GE Corometrics 126 Service Manual

Corometrics 120 series
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Display Board

Revision B
Theory of Operation: Display Board
The display in the 120 Series Monitor is an electroluminescent (EL) glass panel with
two circuit boards mounted on the back, referred to as the Controller Power Unit and
the Driver Board. (The display assembly is manufactured by Planar Systems, Inc.)
The following technical information is a summary of the display circuitry. This
information is provided to give the hospital biomedical engineer an overall summary
of the display's functions in relation to the 120 Series Monitor—to assist in isolating
troubleshooting problems to the board level. This information is not intended to
provide a complete circuit theory and should not be used to repair any problems on
the boards themselves. When a problem does exist with either board, contact your
Corometrics Service Representative for information about repair/exchange of the
entire display assembly.
The Controller Power Unit provides the required operating voltages. The Driver
Board provides the 120 Series Monitor with front panel visual indicators for
displaying all monitoring modes and numeric values. The electroluminescent
display is a 320 column by 256 row flat panel with a resolution of 80 pixels per inch.
The pixel aspect ratio is 1:1. A pixel is defined as the intersecting area between the
column and row electrode.
The Controller Power Unit contains an integrated dc-to-dc converter which accepts
the Vcc1 and Vcc2 supply voltages from the DSP Board. Voltage Vcc1 (+5 V) is
used for the logic on the two display boards. Voltage Vcc2 (+12 V) generates the
high voltage section—not to exceed 195 VAC.
The four basic operational signals (VID, VCLCK, HS, VS), needed to control the
EL panel, are handled by the Driver Board after being processed on the DSP Board.
These signals originate on the DSP Board from graphics generator U13. The
vertical sync signal (VS) controls the vertical position of the picture. The horizontal
sync signal (HS) is used to bracket the active pixel data for a horizontal scan line—
the 320 bits of data from the VID line. The video clock signal (VCLK) is used to
serially shift VID into the display; data latching occurs on the rising edge of the
VCLK signal. Video data (VID) contains the serial pixel information to be
displayed. A pixel is lit as voltage is applied to the specific row and column
electrodes. Data is supplied from left to right and from top to bottom. Bit number
one is displayed as the pixel located in the top left corner of the display; bit number
320 is displayed as the pixel located in the top right corner of the display; and bit
number 321 is displayed as the pixel located directly beneath bit number 1, etc.
120 Series Maternal/Fetal Monitor
2015590-001
4-45

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