Hitachi SH7760 Solution Engine2 Overview page 59

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6.3.1 RTC Control Register (RTCCR)
Address: 0x000, Initial value: 0x00
D7
D6
0
0
R
R
(1) START
START bit
0
1
[Note]
Don't write to any counter while the START bit is set to "0." Rewrite each counter after setting the START bit to "1."
(2) ARI
ARI bit
0
1
(3) 1secI
1secI bit
0
1
(4) 0.5secI
0.5secI bit
0
1
(5) SECCAF
SECCAF bit
0
1
D5
D4
CNTS
SECCAF
R/W
R/W
RTC start (Initial value)
RTC stop
No alarm interrupt is generated. (Initial value)
An interrupt is generated at intervals of 1 second.
No interrupt is generated at intervals of 1 second. (Initial value)
An interrupt is generated at intervals of 1 second.
No interrupt is generated at intervals of 0.5 second. (Initial value)
An interrupt is generated at intervals of 0.5 second.
No carry has been generated in the second counter (SECCNT).
A carry has been generated in the second counter (SECCNT).
[Zero-clear condition]
The counter is cleared with zeros when the SECCAF bit is set to "1."
D3
D2
0.5secI
1secI
R/W
R/W
Setting
Setting
Setting
Setting
Setting
56
D1
D0
ARI
START
R/W
R/W

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