Hitachi EC702HP Operation Manual page 17

Digital Board Digital Board
FPGA FPGA
Rear
Rear USB/FIFO
USB/FIFO
USB Rear
USB
Rear
Rear
MAC/PHY
Rear
MAC/PHY
Ethernet
Ethernet
TS TS
BTS BTS Integrated Integrated
Priority Priority
Decompressor Decompressor Multiplexer Multiplexer
ASI 1
ASI 1 Switch Switch
Equalizer ASI 1
ASI 1
Equalizer
ASI 2
ASI 2 ASI 2
ASI 2
Equalizer Sat/UHF
Equalizer
OCXO Control OCXO Control Internal Internal
Tuner
1Hz PLL 1Hz PLL
GPS UBLOX
GPS UBLOX
ant. GPS
ant.
GPS
10MHz
10MHz
sysclk
sysclk
PPS
PPS in Schmitt PPS
SYSCLK
PPS in Schmitt
SYSCLK
Trigger
Trigger
10MHz 10 MHz
10MHz 10 MHz
in Zero Cross
Zero Cross
in
10MHz
10MHz
OCXO
OCXO
Transmitter
Transmitter Voltage
Control.
Voltage
Clamp
Control.
Green Clamp
Green LPF
Connector
LPF
Connector
Delay Delay
SFN
SFN
Adjust Interleaving
Adjust Interleaving
Memories Memories
Memory Memory Memory Memory
SRAM SRAM
SRAM SRAM
FPGA
FPGA
Reed Reed ISDB ISDB
Remultiplexer Remultiplexer SFN SFN
Solomon Solomon Modulator Modulator
Nios Nios
System Control/Config. System Control/Config.
External Capture. External Capture.
Communication. Communication.
PLLs PLLs
FPGA_CLK
FPGA_CLK
External External External
DAC_CLK
External External External
DAC_CLK Capture Nios
ADC_CLK
Capture Nios
ADC_CLK Memories Memories
Memories Memories
SRAM SRAM
TEST_POINT_1
TEST_POINT_1 SRAM SRAM
Lock_Detect 1
Lock_Detect 1
10MHz sysclk
10MHz lo 10MHz sysclk
1:4
1:4 10MHz lo Lock_Detect 1 Lock _Dete ct 1
10MHz out
10MHz out
Lock_Detect 2
Lock _Dete ct 2 Microcontroller
Microcontroller
System Control/Config.
System Control/Config.
Transmitter Control/Config..
ALC Tran smi tter Control /Confi g..
User Interface
ALC
User Interface
Keyboard/Display
Keyboard/Di spl ay
DIGI
DIGI
1st Part - Block Diagram: Exciter
Time Time
SRAM SRAM
Linear Linear Shape Filter Shape Filter IF Complex IF Complex Non-Linear Non-Linear
Pre-correction Pre-correction Interpolation Interpolation Mixer Mixer Pre-correction Pre-correction
External
External
Nios Shared
Nios Shared
Serial Serial
Serial Serial
Flash Flash
Flash Flash
SPI
SPI
Voltage
Voltage SPI_LO
Converter SPI_LO
Converter
5V/3V3
5V/3V3
Figure 1-5
+28V
+28V
IF Mute
IF Mute
DAC _EN ABLE
DAC _EN ABLE
ASI ASI
ASI Output
ASI Output
Output Output
Switch Switch
7
DAC _CL K
DAC _CL K
B
LPF 1:2
LPF 1:2
d
TX TX DAC DAC
DAC
DAC
7
Balance Balance Interface Interface d
LPF LPF B 1:2
1:2
DAC_ENABLE
DAC _EN ABLE
B
ADC ADC
ADC d
Feedback
ADC
3 Feedback
Interface Interface
ADC _CL K
ADC _CL K
IF I
IF I
TEST
TEST
POI NT POINT
2 2
IF Q
IF Q
TEST
TEST
POI NT POINT
3 3