Hitachi EC702HP Operation Manual page 20

Section 1 - Introduction (UHF Digital TV Transmitters)
E-Compact - Air Cooling - ATSC - High Power
Digital-to-Analog Converter and Analog FI generation
Composed of the DA converter, reconstruction filter (low pass with fc ~ 50MHz) and FI
amplifier.
The DA converter operates at 172.0195804 MSPS (interpolation factor equal to 2) and the output
amplifier with gain of 7dB has a protection circuit that inhibits its operation during the transient
power supply and system startup.
The FI signals I and Q (In-phase and Quadrature) are centered on 18,834MHz (obtained by tithe
1024 * 106/63), with an average power of -20 dBm +/- 0.5 dB and intermodulation lower than
-55 dBc at +/-3.25.
Local Oscillator
The LO circuit is essentially composed of the CI (fractional PLL + VCO) receiving the 10MHz
reference and generates a signal corresponding to twice the frequency of the local oscillator
(used by the mixer complex of the up-converter to generate the LO signal with 0° and 90°) and
also by CI HMC432 which is a frequency divider by 2 (LO signal for monitoring and downconvert).
The value of the frequency of the local oscillator can be obtained by the following equation 6MHz
BW):
LO(C) = (C-14)*6*10
In which C is the desired channel: 14..69
Eg: C=54. LO = (54-14)*6*10
This circuit is configured via SPI interface for A512 microcontroller during system startup. Lock
Detect output is used to check this circuit.
Up-converter
The channel conversion is done by the CI ADL5385, a mixer complex (FI input in quadrature)
and input 2xLO (internal generation of LO 0 ° and 90 °) where the main features are canceling
the image frequency (top rate: LO + FI) and reduced leakage of the local oscillator.
The cancellation of the image frequency is optimized by adjusting the FI quadrature (amplitude
and phase adjustment between I and Q signals).
The reduction of LO leakage is maximized by adding a voltage offset in order to compensate for
the imbalance present in the DC ports of FI.
The minimum expected frequency image rejection is -50dBc and LO leakage is -40dBc.
The converted signal in frequency, lower rate (C = LO - FI), is then submitted to the selector
circuit low pass filter of 2nd harmonic of four bands, VHF B1 (channels 2-6), VHF B3 (channels
7-13), UHF Low (14-42) and UHF High (43-69), automatically selected according to the channel
by the microcontroller A512.
The next step is the Voltage-Controlled Variable Gain Amplifier (CIADL5330) which applies a gain
proportional to the ALC voltage (Gmin ~= -34 dB to ALC = 0V e Gmáx ~= +22 dB to ALC = 1,4V)
applied to the pin 24 of the VGA (after resistive divider). The typical maximum output power is
0dBm for an intermodulation smaller than -50 dBc at +/- 3.25 MHz from the center of the channel.
Down-converter
The circuit "down-converter" performs the selection of one of the two feedback signals (Before
and After Filter or Before and After Filter), performs the beating of this signal with 1xLO using a
real passive mixer and gets a FI signal centered at 18.834 MHz.
Manual Rev. 0.0 - April 2016
6 + 473*10 6 + 1*10 6 /7 + 1024*10
6 + 473*10 6 + 1*10
6 /63 [Hz]
6 /7 + 1024*10 6 /63 = 729,396825 MHz
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