Motorola Digital DNA DSP56F807 Hardware User Manual page 77

Evaluation module
Table of Contents

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Numerics
12VDC power supply
1-4
A
A/D
x
B
Back-EMF
2-22
signals
2-15
C
CAN
x
bus termination
2-1
bypass
2-1
,
interface
2-1
2-24
CiA
x
Clock Source
2-7
Connector
,
A/D
2-32
2-33
Address bus
2-31
CAN
2-34
Data bus
2-32
External Memory Control
PWM
2-35
,
SCI
2-33
2-34
SPI
2-34
Connectors
Peripheral Expansion
D
D/A
x
D/A converter
2-18
Data memory
2-5
Debugging
2-8
DSP
x
DSP56F807EVM
16-bit 3.3V Digital Signal Processor
4.0Amp power supply
4-Channel 10-bit Serial D/A
64Kx16-bit of data memory
64Kx16-bit of program memory
8.00MHz crystal oscillator
CAN bus termination
CAN bypass
2-1
Index
2-28
2-26
2-1
2-13
2-1
2-1
2-1
2-1
2-1
CAN interface
2-1
CAN physical layer peripheral
Development Card
external memory expansion connectors
external oscillator frequency input
FSRAM
2-1
JTAG port interface
MPIO compatible peripheral
On-board power regulation
Parallel JTAG Host Target Interface
PWM compatible peripheral
real-time debugging
RS-232 interface
SPI compatible peripheral
test points
2-36
Timer compatible peripheral
UNI-3 connector/interface
E
Encoder/Hall-Effect
circuits
2-23
Encoder/Timer
2-29
EVM
x
External Memory Control Signal
F
FSRAM
2-5
G
,
,
GPIO
x
2-27
2-31
signals
2-17
H
Hall-Effect/Quadrature Encoder interface
Host Parallel Interface Connector
Host Target Interface
I
IC
x
J
,
,
JTAG
xi
1-1
2-1
connector
2-9
Index
2-2
2-1
2-2
2-1
2-1
2-2
2-2
2-1
2-2
2-8
2-1
2-2
2-2
2-14
2-28
2-1
2-8
2-8
1

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