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Chapter 2
Technical Summary
The DSP56F807EVM is designed as a versatile Digital Signal Processor, (DSP),
development card for developing real-time software and hardware products to support a
new generation of applications in digital and wireless messaging, servo and motor control,
digital answering machines, feature phones, modems, and digital cameras. The power of
the 16-bit DSP56F807 DSP, combined with the on-board 64K × 16-bit external program
static RAM (SRAM), 64K × 16-bit external data SRAM, CAN interface,
Hall-Effect/Quadrature Encoder interface, motor zero crossing logic, motor bus
over-current logic, motor bus over-voltage logic and parallel JTAG interface, makes the
DSP56F807EVM ideal for developing and implementing many motor controlling
algorithms, as well as for learning the architecture and instruction set of the DSP56F807
processor.
The main features of the DSP56F807EVM, with board and schematic reference
designators include:
• DSP56F807 16-bit 3.3V Digital Signal Processor operating at 80MHz [U1]
• External fast static RAM (FSRAM) memory [U2], configured as:
— 64K×16-bit of program memory with 0 wait states at 70MHz
— 64K×16-bit of data memory with 0 wait states at 70MHz
• 4-Channel 10-bit Serial D/A, SPI for real-time user data display [U14]
• 8.00MHz crystal oscillator for DSP frequency generation [Y1]
• Optional external oscillator frequency input connector [JG5 and JG6]
• Joint Test Action Group (JTAG) port interface connector for an external debug
Host Target Interface [J3]
• On-board Parallel JTAG Host Target Interface, with a connector for a PC printer
port cable [P1]
• RS-232 interface for easy connection to a host processor [U13 and P3]
• CAN interface for high speed, 1.0Mbps, communications [U8 and J24]
• CAN bypass and bus termination [J25 and JG3]
Technical Summary
2-1
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