Figure 5-12 Operations Points Of Interrupt Processes - Fujitsu F2MC-8FX Series User Manual

8-bit microcontroller bits pot yellow lin board
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The next section explains the sample programs, but the sample programs contain parts in which LIN
communication with bits pot white are not used. To make these parts expandable, programs
commensurate with LIN use are included. Not all operations, however, are checked. Be careful when
using.
The operations points of the sample program in the LIN protocol during LIN communication are
shown below. The sample software operates as a LIN slave through multiple interrupt processes, as
shown in "
Figure 5-12 Operations points of interrupt processes". Look at the processing of the sample software
in the LIN frame fields.
HEADER
Sync Break
Sync break interrupt
Input capture interrupt
① Sync break
In sync breaks, the sync break signals (13 to16-bit Low signals) are received from bits pot
white (the master), and when the bus reaches "0" in the 11-bit time or greater, a sync break
interrupt is created. When a sync break interrupt is detected, the sync break interrupt
prohibition settings and input capture interrupts are authorized, and the system migrates to
waiting for the synch field to start.
Sync Byte
ID Field
ID
Data reception interrupt

Figure 5-12 Operations points of interrupt processes

RESPONSE
Data Field
DT
Data reception interrupt
Data reception interrupt
99
AN07-00200-03E
Checksum Field
DT
Check Sum
Data reception interrupt

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