Mitsubishi Electric MELSEC iQ-R Series User Manual page 86

Master function each node status area
This area is used to store the operation status of each slave node.
■Configuration status of nodes (Un\G436 to Un\G439)
The parameter setting status of the slave node is stored.
When the corresponding bit is on: The parameters have already been set.
When the corresponding bit is off: No parameter is set.
The following table lists the node addresses corresponding to each bit of the buffer memory addresses.
Buffer memory address
Un\G436
Un\G437
Un\G438
Un\G439
• Timing when the bit turns on
If the parameter check normally completes when the I/O communication is started or the master function parameter is saved
in the flash ROM, the bit corresponding to the set slave node turns on.
• Timing when the bit turns off
Remove the setting of the slave node from the master function parameter, and start the I/O communication or save the master
function parameter in the flash ROM. When the parameter check normally completes, the bit corresponding to the removed
slave node turns off.
When the CPU module of the master node is reset or powered off and on, all bits turn off.
■Communication status of nodes (Un\G444 to Un\G447)
The I/O communication status of the slave node is stored.
When 'I/O communicating' (X01) is off, all bits turn off.
When the corresponding bit is on: Communicating
When the corresponding bit is off: Communication interrupt
The following table lists the node addresses corresponding to each bit of the buffer memory addresses.
Buffer memory address
Un\G444
Un\G445
Un\G446
Un\G447
■Communication error status of nodes (Un\G448 to Un\G451)
The I/O communication error status of the slave node is stored.
When 'I/O communicating' (X01) is off, all bits turn off.
No error is detected for the node where the corresponding bit of 'Down node detection prohibit setting' (Un\G460 to Un\G463)
turns on.
When the corresponding bit is on: A communication error occurs.
When the corresponding bit is off: No communication error occurs.
The following table lists the node addresses corresponding to each bit of the buffer memory addresses.
Buffer memory address
Un\G448
Un\G449
Un\G450
Un\G451
When one of the bits in this area is turned on, 'Slave down signal' (X04) turns on.
APPX
84
Appendix 3 Buffer Memory
b15 b14
Node 15 Node 14
Node 31 Node 30
Node 47 Node 46
Node 63 Node 62
b15 b14
Node 15 Node 14
Node 31 Node 30
Node 47 Node 46
Node 63 Node 62
b15 b14
Node 15 Node 14
Node 31 Node 30
Node 47 Node 46
Node 63 Node 62

b1

Node 1

Node 17

Node 33

Node 63

b1

Node 1

Node 17

Node 33

Node 63

b1

Node 1

Node 17

Node 33

Node 63
b0
Node 0
Node 16
Node 32
Node 48
b0
Node 0
Node 16
Node 32
Node 48
b0
Node 0
Node 16
Node 32
Node 48