Description; Theoryofoperation; Microprocessor; Memory - Motorola R-20010 Maintenance Manual

Communications system analyzer
Table of Contents

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SECTION 14.
PROCESSOR BOARD (A14) 01-P22240E001
PROCESSOR BOARD (A14) 01-P29050H001
PART 1. PROCESSOR BOARD 01-P22140E001
14.1
DESCRIPTION
The
Processor
board provides primary
control
and
data manipulations
for the System
Analyzer.
This
board
contains the
microprocessor, program
read-only
memory (ROM), nonvolatile memory
(NVM),
ran-
dom-access memory
(RAM),
peripheral-interface
adapter (PIA), timing
generator,
and character
gen-
erator. Input and
output
information is transferred
through the
(PIA)
and the address,
data,
and control
busses. The board uses
a
Motorola M6800-series
microprocessor,
2K X8 of
RAM, IK
X
8
of NVM, and
24KX8
of paged ROM.
A block diagram
of
the Processor board
is shown
at
the end
of
this
section
in Figure
14-2,
a schematic
in
Figure 14-3, and the printed wiring board assembly and
parts
list
in Figure 14-4.
14.2
THEORY OF OPERATION
14.2.1
MICROPROCESSOR
An M6809 microprocessor
controls
the System
Ana-
lyzer's
operating
mo~es. Th~
device
has
an 8-bit data
ADDRESS
PAGE
1
0
2000
XROM 1
OPTION
8
4000
XROM 2
OPTION A
6000
XRO
M
3
O
PTION A
8000
AOOO
cooo
EOOO
FFFF
bus,
a
16-bit
address
bus, and
a control
bus
which syn-
chronizes
data transfer
and specialized
processor
functions.
The microprocessor uses the
4-MHz crystal
14.2.2
MEMORY
14.2.2.1
Memory
Access
To
allow the microprocessor's
16-bit
address
to
access more than 64K
of
memory, the memory is
structured
in pages,
as shown
in Figure
14-1.
The pages
are
broken
down into chip-select blocks. To
select
a
page of
memory,
the processor uses two outputs
(PB1
and PB2)
from
PIA
U22.
(See the
All
section,
para-
graph 13.2.1.1 for
a
description
of
the PIA.) These two
signals
work in conjunction with
the address
decoders
(U23, U50,
and U51)
to select the
proper memory
device.
(Y1)
to provide an
operating
frequency of 1 MHz on
the E
and
Q
lines.
14.2.2.2 Program
Read-Only Memory
(ROM)
The program memory for
the
main System Ana-
lyzer is located
on
page
2 of
the memory map. The
PAGE
2
PAGE 3
R
AM
AND
1
/0
ROM 1
X
OROM
OPTIO
N
8
O
ROM
ROM
2
O
PTION
A
R
OM
3
O
PTION
A
R
O
M
4
R
OM
S
ROM
6
R
O
M
7
Figure
14-1.
M
emory
Ma
p
14-1

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