Mitsubishi Electric MELSEC iQ-R Series User Manual page 35

RD81MES96
: Accessible, : Not accessible, : No device
Device name (device)
Function input (FX)
Function output (FY)
Function register (FD)
Special relay (SM)
Special register (SD)
Input relay (X)
Output relay (Y)
Internal relay (M)
Latch relay (L)
Annunciator (F)
Edge relay (V)
Link relay (B)
Data register (D)
Link register (W)
Timer Contact (TS)
Coil (TC)
Current value (T/TN)
Long timer Contact (LTS)
Coil (LTC)
Current value (LT/LTN)
Counter Contact (CS)
Coil (CC)
Current value (C/CN)
Long counter Contact (LCS)
Coil (LCC)
Current value (LC/LCN)
Retentive timer Contact (STS, SS
Coil (STC, SC
Current value (ST/STN,
*4
ST/SN )
Long retentive Contact (LSTS)
timer
Coil (LSTC)
Current value (LST/LSTN)
Link special relay (SB)
Link special register (SW)
Step relay (S)
Direct input (DX)
Direct output (DY)
Index register (Z)
Long index register (LZ)
File register (R)
(ZR)
(ERn\R)
Access target device type (series)
RCPU
Programmable controller
CPU/Process CPU
*1*2
CPU
General High-speed
access access
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
*4
 
)
*4
)  
 
 
 
 
 
 
 
 
 
 
 
 
 
 
QCPU (Q mode)
C Controller Programma
*1
/Safety module ble
controller
CPU/
Process
CPU
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2.2 Access Specifications for a CPU Module
LCPU
C Controller Programma
module ble
controller
CPU
 
 
 
 
 
 
 
 
 
 
 
*3
 
 
*3
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2 SPECIFICATIONS
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