Package Markings; Functional Descriptions - Epson Power Supply IC S1F70000 Technical Manual

PACKAGE MARKINGS

The markings on S1F79100Y series device packages
use the following abbreviations.
Parameter
Output voltage code
Voltage regulator code
Note
The reflow furnace temperature profile requirements
must be satisfied during package reflow. Avoid solder-
ing on surface mount package (including SOT89) as it
causes a quick temperature change of package and a
device damage.

FUNCTIONAL DESCRIPTIONS

Basic Operation
The S1F79100Y series uses a 3-pin series regulator
feedback loop. An operational amplifier compares
V from the voltage divider formed by R
REG
with V . The amplifier output adjusts the output
REF
transistor gate bias to equalize the voltages and com-
pensate for fluctuations in V
V
REF
–
+
V
I
The following equation shows the relationship between
V and V .
O REF
R + R
1 2
V = — — — — — V
O REF
R
1
S1F70000 Series
Technical Manual
Code Description
B 5 V
D 3 V
P Positive
N Negative
and R ,
1 2
.
I
GND
R
1
V
REG
R
2
V
O
EPSON
Marking locations
Voltage regulator
code
Internal Circuits
Reference voltage generator
The offset structure used in all three transistors results
in a high breakdown voltage that ensures a stable refer-
ence voltage output over a wide range of input voltages.
V
SS
S1F79100Y Series
Output voltage
code
Enhancement
mode
V
REF
Depletion
mode
Depletion
mode
V
1
3–35