Sharp UP-3300 Service Manual page 60

14-2. Drawer open/close sense
The drawer open/close sense signal is input into the built-in port of
the CPU. the sense signal of an optional drawer sensor is also wired
ORed before inputting.
•
P33=1: Any of the drawers is open.
15. IR communication
Data is exchanged with the MPCA8 using the channel 1 (SCI1) of the
serial communication interface of the CPU.
15-1 CPU interface and modulator/demodulator
Here is its block diagram.
UATX
TXD1
UARX
RXD1
CPU
ASK modulation/
UASCK
SCK1
demodulation
491KHz
Baud rate X16
16. SRN
The SRN of the UP-3300 is compatible with the ER-A750.
17. RS232
Two standard RS232 channels are compatible with the ER-A5RS.
However, while the ER-A5RS uses the IRQ2 terminal of the CPU for
interruption of the RS232, the UP-3300 cannot use the IRQ1 terminal
instead of it. (The IRQ2 terminal is used for IR as the SCK1 terminal.)
The standard RS232 is fixed to the logic channels 1 and 2. To the
built-in printer, logic channel 7 is assigned. Use the channels 3, 4, 5
and 6 for the ER-A7RS.
18. MCR
This paragraph describes MCR option (UP-E12MR2) control defined
by UP-3300 hardware architecture.
2 channels of the serial port (interchangeable with 8251) built in the
MPCA8 are used. 2 tracks of data are read simultaneously. Supports
the first and second tracks MCR of ISO. (UP-E12MR2)
18-1. CPU interface
The CPU interface for the USART (8251) and magnet card reader
(MCM-21) in the UP-3300 system is shown below.
Integrated as MPCA8
in the UP-3300 system.
CPU
MPCA7
INTMCR
ICI
INTMCR
RPM851
IRTX
IRDA modulation/
IRRX
demodulation
Baud rate
X
IR unit
ASKRX
Divider
MPCA8
7.3728MHz
Fig. 20
8251 x 2
RCVCLK1 RCP1
RCVDT1
RCVCLK2
RCVDT2
/DSR1
/DSR2
CLS2
RCVRDY1 RCVRDY1
RCVRDY2 RCVRDY2
CLS1,
CLS2
SYNC
Signal description
RCP1 TRACK 1 CLOCK PULSE
RDD1 TRACK 1 DATA SIGNAL
RCP2 TRACK 2 CLOCK PULSE
RDD2 TRACK 2 DATA SIGNAL
CLS1 TRACK 1 CARD DETECTION SIGNAL
CLS2 TRACK 2 CARD DETECTION SIGNAL
RCVRDY1 TRACK 1 DATA RECEIVING SIGNAL
RCVRDY2 TRACK 2 DATA RECEIVING SIGNAL
INTMCR INTERRUPT SIGNAL OR-SYNTHESIZED from
RCVRDY and SYNC input
2 chip select signals for 8251 are generated inside MPCA8. The 8251
write recovery time is as follows:
18-2. MCR interface
The operating timing of the MCR interface signals is given below.
(1) Example of timing
CLS1/CLS2
RCP1/RCP2
RDD1/RDD2
(2) Detailed timing (relation between DATA and CLOCK PULSE)
RCP1/RCP2
RDD1/RDD2
The "NULL" CODE is basically written prior to the opening code. The
opening code detection algorithm is considered because data may
become corrupt before and after the CARD detection signal due to a
worn magnet stripe.
19. Touch panel interface
The 8251 built in the MPCA8 is used as serial communication with
the touch panel controller.
8251 (TPZ):
Interrupt:
D0~D7
A0
RD
HWR
TP7(00FFB8h~00FFBBh)
RESET
PHAI(9.83)
÷
9.83MHz 64
(153.59KHz)
RDD1
INT2
RCP2
RDD2
CLS1
Duplex type: Full-duplex
! Data rate: 9600 Bps
" Synchronizing mode: Asynchronous
# Signal level: TTL
Data format: 1 Start-bit
7 – 27
"0" "1"
Approx. 16µs Min. 16µs
Located in 00FFB8h ∼ 00FFBBh.
Signal sending interrupt is connected to the INT3.
Signal receiving interrupt is connected to the INT2.
8251 (USART)
D0~D7 TXD
DTR
C/D RTS
RD RXD
WR CTS
CS DSR
RESET TXC
CLK RXC
TXRDY
RXRDY
TXEMPTY
SYNDET
8 Data-bit
Stop-bit
Non parity-bit
"1"
TPTXD
OPEN
OPEN
TPRXD
GND
GND
TPCKI
INT3
OPEN
OPEN