Pioneer PX-7 Service Manual page 103

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13.
11
CIRCUITS
USED
IN
SEPARATE BLOCKS
(ANALOG
ASS'Y)
13.
11 Synchronizing
Signal
(Internal)
Separator
Horizontal
and
vertical
synchronizing
pulses
are
separated
as
a
composite
synchronizing
signal
from
the
VDP
(TMS9129)
Y
signal
(luminance
signal).
13.
12 Synchronizing
Signal (External)
Separator
The
circuit
structure
of
both
the external
and
internal
synchronizing
signal
separators
is
practical-
ly
identical.
Therefore,
the
description here
is
limited to
the external
circuit (see
Fig.
13-45).
The
video
signal
passed
via
the
Q101
buffer
is
applied to
the
Q104
buffer to
be added
to
the
DC
level
of the
Q104
base (kept
at
a
constant voltage
by
the
Q102
bias
circuit).
The
Q105
emitter
voltage,
on
the other hand,
is
kept
at
a
voltage
approximately 0.6V
(junction
voltage)
higher than
the
Q104
emitter voltage
when
there
is
no
signal.
And
since the
time constant
determined by the
Q105
emitter
resistance
R113
and
capacitor
C104
is
sufficiently large
enough,
Q105
is
turned
off
when
the
Q104
emitter voltage
exceeds the
Q105
cut-off voltage,
resulting
in
the
Q105
collector
output
being
changed
to
L
level.
Horizontal synchronization
1
ps/div
a:
VIDEO
input
waveform (200mV/div)
b:
Waveform
(3)
(composits synchronizing
signal
output)
(IV/div)
Photo
13-1
13.
13
Vertical
Synchronizing
Signal
Separator
The
circuit
structure
of
both
the
internal
and
external
vertical
synchronizing
signal
separators
is
practically
identical.
Therefore, the description
here
is
limited to the external
circuit (see Fig.
13-46).
The
composite
synchronizing
signal
obtained
from
the
external
video
signal
(which
is
wave-
shaped and
polarity
inverted
in
the
gate array
IC102)
is
passed through a low-
pass
filter
(R156,
Cl
41,
and R158)
where
the
vertical
synchronizing
signal
is
separated,
wave shaped by Q114, and
ored
with
R SYNC
then
applied to
Q102
again.
1
03

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