Pioneer PX-7 Service Manual page 99

13.9
PRINTER
l/F
Data bus
latch
data
from
the
8-bit latch
74LS374
(IC32)
is
passed
t
o the printer
in parallel via
pins
2
thru
9.
And
the
PSTB
signal
from
the gate array
(IC3)
is
passed
as
a strobe
signal via
the
IC38 and
IC40
buffers to
pin
1.
The
BUSY
signal
from
the
printer
is
passed
from
pin 11 to the
CPU
via
a
three-state
buffer (IC45) and data bus Dl.
(1)
90H
(image
92, 94,
and 96H) and
91H
(image
91, 93,
and 97H)
are
generated
in
the
gate
array
by LPT(90
thru
97H) and AO/AO.
(2)
90W
is
formed
with
90H WR,
and
DO
is
latched
and
passed to
PSTB
at the leading
edge of
WR,
thereby
obtaining
PSTB
via
the
IC38 and IC40
buffers.
(IC40
is
connected
in parallel
for
fan-out enlargement.)
(3)
90R -
BUSYEN
is
formed
with
90H
RD
to
enable the
BUSY
input
three-state buffer
and
inpu
t
of the
BUSY
signal
to
Dl.
(4)
91W =
LPTE
is
formed
with
91H WR,
and
DO
thru
D7
are latched
at
the
leading
edge of
WR
to obtain the
PDBO
thru
PDB7
outputs.
With
the
Q
output switched
to
high
impedance by
the system
reset period
©C
changed
to H, IC32
prevents occurrence
of abnormal
operations.
PRINTER
l/F
TJ
_TL
1
u
|°'U
L
|
I>o
-.
H
|
8
l
s
0
Y
,
l
8
^,
I
|Do_
,
|!ii
S
n
r
. I
UTLn
TL
TUT
u
i
/
u
1/
j
1
l
1
f
HIGH IMPEDANCE
I
.
\l
1
/
|
PRINT
DATA
LATCH OUTPUT
1
1_TU
LTLT
9S
Fig.
13-40
Printer l/F
timing
chart