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PX-7
Countermeasures
to
be
Taken
for Different
Test
Results (Analysis of Defective
Positions)
Step
1
&
Step
2
These
tests
are
used
to
check whether
test result
outputs
are
normal
or not.
This
program employs
three
means
of handling
test result
outputs
—
CEN-
TRONICS
CHECK BOARD
LED
lamps,
DISPLAY
OUT,
and
SOUND
OUT. The
following
tests
can
be
executed
as
long
as
any one of
these
means
is
functioning normally.
If
all
three
are
malfunction-
ing,
however,
no
further testing
is
possible. All
three
means
should be functioning
correctly at
all
times.
The
likely
defective positions
if
a
failure
occurs
are
described
below.
1.
CENTRONICS CHECK
BOARD
LED
-*
Printer
interface
NG
o
ALL
LEDs
NG
• Check
signal
between
gate array (IC3)
and
CPU
(IC1)
• Check
gate array (IC3)
LPTE, PSTB,
and
BUSYEN
signals
• Check
data
latch
(IC32)
• Check
printer
connector
o
Some
of the
LEDs
NG
-*
PDO
thru
PD7
NG
•
Check
DO
thru
D7,
IC32,
and connector
o
STEP
button malfunction
-*
BUSY
system
NG
• Check
CONNECTOR
(11
pin),
IC45,
and
D1
Subsequent
tests
cannot be executed
if
STEP
button
fails
to
function.
2.
DISPLAY
OUT
-*
VDP
section,
analog
ass'y
video
system
NG
o
No
output of
VDP
(IC2) Y, R-Y,
B-Y
• Check
VDP CLK
• Check
signal
between
V
DP
a
nd
CPU,
and
also
check
the gate array
VDP
signal
o
Y, R-Y,
and B-Y
are
OK,
but
no
picture
•
Check
analog
ass'y
video
system
•
Use
RGB OUT
if
available
o
Picture obtained,
but
is
not normal
• Check
signal
between
VDP
and
VRAM
(IC20
&
IC21)
3.
SOUND OUT
-*
PSG
section
analog
ass'y
audio
system
NG
o
No PSG
(IC5) A, B,
and
C
outputs
• Check
signal
bet
ween
PSG
and
CPU
• Check
gate array
PSG
signal
• Check
clock input
o
A,
B,
and
C
obtained,
but no sound
• Check
ASCL
and
ASCR,
and check
Q10
/
Qll
if
NG
•
Check
the analog
ass'y
audio system
4.
LEDs,
DISPLAY,
and
SOUND
all
NG
• Have
slots
#0
and
#1
been
switched?
•
Is
the
CPU
clock ($)
OK?
•
Is
address
bus
AO
thru
A1
5
normal?
•
Is
data
bus
DO
thru
D7
normal?
Check
signal
matching between
buffer
input
and
output,
and check
short/open
• Are
control
signals
normal?
•
Is
the front
cartridege
slot
connector
signal
normal?
Step
3
PPI1
— NG
(which
means
2 thru 4
are
also
NG)
• Check
signal
between PPI
(IC4)
and
CPU
• Check
GATE ARRAY,
PRW
and
PPIR
sig-
nals
PPI1
-
OK,
but
2,
3,
or 4
NG
•
Check
PPI,
PAO
thru
P A7, IC28
,
and IC11
2
—
NG:
Check between
SLTSL2
and
P-BASIC
ROM
(IC13)
and around
the
P-BASIC
ROM
3
—
NG:
Check between
SLTSL1
and
MSX-
BASIC
ROM
(IC12)
and around
the
MSX-BASIC
ROM
4
—
NG
:
Same
check
as
"3
—
NG"
if
f ailure in
3,
but check
between
SLTSL1
and
RAM
(IC15,
IC16,
IC18,
and
IC19),
and
around
the
RAM
if
3
is
OK.
Step
4
CAN'T
CONTINUE
• Check
GATE ARRAY,
RAS, CAS,
and
MPX
signals,
and
also
the IC14, IC17, IC34,
and
IC43
signals
5
-
NG,
7
-
NG
• Check
IC15, IC18,
and
CA52
6
-
NG,
8
-
NG
• Check
IC16, IC19,
and
CAS3
If
5
is
OK
but 7
NG,
or
if
6
is
OK
but
8
NG
etc,
a
defective
RAM
is
the
likely
cause.
If
the higher order
bits are
abnormal due
to
change
in
read data
when NG,
check IC18 and
IC19, or
if
the
lower order
bits are
abnormal, check
IC15
and
IC17.
Step 5
• Check
signal
between
VDP
and
VRAM
(IC20
and IC21)
Step
6
10
-
NG
•
STEP
3
Is
PPI2
OK?
See
STEP
3
if
NG,
and
check
P-BASIC
ROM
if
OK
11
-
NG
•
STEP
3
Is
PPI3
OK?
See
STEP
3
if
NG,
and
check
MSX-BASIC
ROM
if
OK
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