Pioneer PX-7 Service Manual page 82

13.4
RAM
(RANDOM
ACCESS
MEMORY)
The main
RAM
consists
of four
16K
X
4-bit
An
address multiplexer (IC1 4
and IC17)
is
used
for
D-RAMs
(dynamic
RAMs)
MB81
416-12
(IC15,
RAM
addressing purposes.
IC16, IC18,
and IC19)
for
form
a
32K
byte
area.
13. 4.
1
RAM
Selection
(1)
The main
RAM
is
allocated to
8000H
thru
FFFFH
of
slot 0
(32K
bytes)
with
D-RAMs
(dynamic
RAMs)
used
as the
RAM
elements.
Refreshing
is
required
when
D-RAMs
are
used,
and
because of
restrictions
on
the
number
of package
pins,
addressing
is
divided int
o
two
steps.
This
in
turn requires the use of
RAS
(row-address
strobe)
and
CAS
(column-address
strobe) control
signals
plus various
MPX
signals
for the multiplexer.
These
signals are
generated
in
the
gate array.
(2)
The
MPX
signal
is
used
in
row/column
address
switching
prior
to passing addresses to the
RAM.
(3)
Although
the
RAS
signal
is
passed
via a logic
circuit
for reasons related to the
gate a rray,
it
may
be
considered as equivalent to the
MERQ
signal.
(4)
Apart from
the
refresh cycle,
the
MPX
signal
is
switched
to
H
level at
the
leading
edge of the
first
<p
(clock) after
MERQ
is
switc
hed
to
L
level,
and
is
switched to
L
level
when
RFSH
is
L
or a
t
the leading
edge of
the
first
0 after
MER
Q
is
switched to H.
(5)
CAS
is
switched to
L
at
the
trailing
edge of the
first
<j>
after
MPX
is
been
s
witched
to
H, and
is
switched
to
H
when
MERQ
is
switched to H.
Fig.
13-11
RAM
selection
B2