Mitsubishi Electric MELSEC iQ-R Series User Manual page 25

Timing to perform the access control
The following figure shows the timing chart for the access control on output data areas.
'PN to CPU handshake flag
(data consistency setting output area)'
(Un\G17136 to Un\G17143)
'CPU to PN handshake flag
(data consistency setting output area)'
(Un\G17049 to Un\G17056)
Output data writing by the
CPU module
Output data area
Control by the RJ71PN92
Control by a program
Precautions
When creating a program to write output data, follow the precautions below.
• When one of the bits of 'CPU to PN handshake flag (data consistency setting output area)' (Un\G17049 to Un\G17056) and
'PN to CPU handshake flag (data consistency setting output area)' (Un\G17136 to Un\G17143) corresponding to the IO
device that exchanges the I/O data is in the on state and the other is in the off state, the consistency of output data is not
ensured. When output data is written while one of the bits is in the on state and the other is in the off state, the output data
before the update may be output to the IO device.
• After data is written to the output data area, reverse the on/off state of the bit of 'CPU to PN handshake flag (data
consistency setting output area)' (Un\G17049 to Un\G17056) corresponding to the IO device that exchanges the I/O data.
(On  Off or Off  On) If the on/off state of this bit is not reversed, the output data areas are not updated.
ON
OFF
ON
OFF
Allowed Prohibited
0
Comparing
Write
the status
OFF→ON
Allowed Prohibited
1 2
Update
Update
OFF→ON
Comparing
Write
the status
ON→OFF
Allowed
3
ON→OFF
Comparing
Write
the status
OFF→ON
1 FUNCTIONS
1.2 Data Consistency Function
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