Motorola MVME2400 Series Installation And Use Manual page 114

Environment Modification
6
6-12
L2 Cache Parity Enable [On-Detection/Always/Never - O/A/N] = O?
L2 Cache parity is enabled upon detection. (Default)
O
L2 Cache parity is always enabled.
A
L2 Cache parity is never enabled.
N
PCI Interrupts Route Control Registers (PIRQ0/1/2/3) = 0A0B0E0F?
Initializes the PIRQx (PCI Interrupts) route control registers in the
IBC (PCI/ISA bus bridge controller). The ENV parameter is a 32-bit
value that is divided by four to yield the values for route control
registers PIRQ0/1/2/3. The default is determined by system type. For
details on PCI/ISA interrupt assignments and for suggested values to
enter for this parameter, refer to the 8259 Interrupts section of the
MVME2400 Series VME Processor Module Programmer's Reference
Guide.
Note
LED/Serial Startup Diagnostic Codes: these codes can be
displayed at key points in the initialization of the hardware
devices. Should the debugger fail to come up to a prompt, the last
code displayed will indicate how far the initialization sequence
had progressed before stalling. The codes are enabled by an ENV
parameter:
Serial Startup Code Master Enable [Y/N]=N?
A line feed can be inserted after each code is displayed to prevent it
from being overwritten by the next code. This is also enabled by an
ENV parameter:
Serial Startup Code LF Enable [Y/N]=N?
The list of LED/serial codes is included in the section on MPU,
Hardware, and Firmware Initialization in the PPCBug Firmware
Package User's Manual.
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