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Instruction Set Summary
This chapter summarizes the instructions by listing them according to their functional class. This
allows to identify the right instruction(s) for a specific required function.
The following notes apply to this summary:
Data Addressing Modes
Rw:
– Word GPR (R0, R1, ... , R15)
Rb:
– Byte GPR (RL0, RH0, ..., RL7, RH7)
reg:
– SFR or GPR
(in case of a byte operation on an SFR, only the low byte can be accessed via 'reg')
mem:
– Direct word or byte memory location
[...]:
– Indirect word or byte memory location
(Any word GPR can be used as indirect address pointer, except for the arithmetic,
logical and compare instructions, where only R0 to R3 are allowed)
bitaddr:
– Direct bit in the bit-addressable memory area
bitoff:
– Direct word in the bit-addressable memory area
#data:
– Immediate constant
(The number of significant bits which can be specified by the user is represented by
the respective appendix 'x')
#mask8:
– Immediate 8-bit mask used for bit-field modifications
Multiply and Divide Operations
The MDL and MDH registers are implicit source and/or destination operands of the multiply and
divide instructions.
Branch Target Addressing Modes
caddr:
– Direct 16-bit jump target address (Updates the Instruction Pointer)
seg:
– Direct 2-bit segment address
(Updates the Code Segment Pointer)
rel:
– Signed 8-bit jump target word offset address relative to the Instruction Pointer of the
following instruction
#trap7:
– Immediate 7-bit trap or interrupt number.
Semiconductor Group
30Mar98@15:00h
9
C166 Family Instruction Set
Instruction Set Summary
Version 1.2, 12.97
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