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ASHR
Syntax
Operation
Data Types
Description
Condition Flags
Addressing Modes
Semiconductor Group
30Mar98@15:00h
Arithmetic Shift Right
ASHR
op1, op2
(count) ← (op2)
(V) ← 0
(C) ← 0
DO WHILE (count) ≠ 0
(V) ← (C) ∨ (V)
(C) ← (op1
)
0
) ← (op1
(op1
) [n=0...14]
n
n+1
(count) ← (count) - 1
END WHILE
WORD
Arithmetically shifts the destination word operand op1 right by as many
times as specified in the source operand op2. To preserve the sign of the
original operand op1, the most significant bits of the result are filled with
zeros if the original MSB was a 0 or with ones if the original MSB was a 1.
The Overflow flag is used as a Rounding flag. The LSB is shifted into the
Carry. Only shift values between 0 and 15 are allowed. When using a
GPR as the count control, only the least significant 4 bits are used.
E
Z
0
*
E Always cleared.
Z Set if result equals zero. Cleared otherwise.
V Set if in any cycle of the shift operation a 1 is shifted out of the carry
flag. Cleared for a shift count of zero.
C The carry flag is set according to the last LSB shifted out of op1.
Cleared for a shift count of zero.
N Set if the most significant bit of the result is set. Cleared otherwise.
Mnemonic
ASHR
Rw
, Rw
n
ASHR
Rw
, #data4
n
C166 Family Instruction Set
V
C
N
S
S
*
Format
AC nm
m
BC #n
38
Instruction Description
ASHR
Version 1.2, 12.97
Bytes
2
2
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