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Siemens C16 Series Instruction Set Manual page 39

16-bit cmos single-chip microcontrollers

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ATOMIC
Syntax
Operation
Description
Note
Condition Flags
Addressing Modes
Semiconductor Group
30Mar98@15:00h
Begin ATOMIC Sequence
ATOMIC
op1
(count) ← (op1) [1 ≤ op1 ≤ 4]
Disable interrupts and Class A traps
DO WHILE ((count) ≠ 0 AND Class_B_trap_condition ≠ TRUE)
Next Instruction
(count) ← (count) - 1
END WHILE
(count) = 0
Enable interrupts and traps
Causes standard and PEC interrupts and class A hardware traps to be
disabled for a specified number of instructions. The ATOMIC instruction
becomes immediately active such that no additional NOPs are required.
Depending on the value of op1, the period of validity of the ATOMIC
sequence extends over the sequence of the next 1 to 4 instructions being
executed after the ATOMIC instruction. All instructions requiring multiple
cycles or hold states to be executed are regarded as one instruction in this
sense. Any instruction type can be used with the ATOMIC instruction.
The ATOMIC instruction must be used carefully (see introductory note).
The ATOMIC instruction is not available in the SAB 8XC166(W) devices.
E
Z
-
-
E Not affected.
Z Not affected.
V Not affected.
C Not affected.
N Not affected.
Mnemonic
ATOMIC
#irang2
C166 Family Instruction Set
V
C
N
-
-
-
Format
D1 :00##-0
39
Instruction Description
ATOMIC
Version 1.2, 12.97
Bytes
2

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