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Siemens C16 Series Instruction Set Manual page 122

16-bit cmos single-chip microcontrollers

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caddr:
Specifies an absolute 16-bit code address within the current segment. Branches MAY
NOT be taken to odd code addresses. Therefore, the least significant bit of 'caddr' must
always contain a '0', otherwise a hardware trap would occur.
rel:
This mnemonic represents an 8-bit signed word offset address relative to the current
Instruction Pointer contents, which points to the instruction after the branch instruction.
Depending on the offset address range, either forward ('rel'= 00
('rel'= 80
H
cuted, when 'rel' = '-1' (FF
double-word-sized branch instruction.
[Rw]:
In this case, the 16-bit branch target instruction address is determined indirectly by the
content of a word GPR. In contrast to indirect data addresses, indirectly specified code
addresses are NOT calculated via additional pointer registers (eg. DPP registers).
Branches MAY NOT be taken to odd code addresses. Therefore, the least significant bit
of the address pointer GPR must always contain a '0', otherwise a hardware trap would
occur.
seg:
Specifies an absolute code segment number. The devices of the SAB 80C166 group
support 4 different code segments, while the devices of the C167/5 group support 256
different code segments, so only the two or eight lower bits (respectively) of the 'seg'
operand value are used for updating the CSP register.
#trap7:
Specifies a particular interrupt or trap number for branching to the corresponding inter-
rupt or trap service routine via a jump vector table. Trap numbers from 00
be specified, which allow to access any double word code location within the address
range 00'0000
For the association of trap numbers with the corresponding interrupt or trap sources
please refer to chapter "Interrupt and Trap Functions".
Semiconductor Group
30Mar98@15:00h
to FF
) branches are possible. The branch instruction itself is repeatedly exe-
H
) for a word-sized branch instruction, or 'rel' = '-2' (FE
H
...00'01FC
in code segment 0 (ie. the interrupt jump vector table).
H
H
C166 Family Instruction Set
122
Addressing Modes
to 7F
) or backward
H
H
) for a
H
to 7F
can
H
H
Version 1.2, 12.97

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