Siemens C16 Series Instruction Set Manual page 68

EXTR
Syntax
Operation
Description
Note
Condition Flags
Addressing Modes
Semiconductor Group
30Mar98@15:00h
Begin EXTended Register Sequence
EXTR op1
(count) ← (op1) [1 ≤ op1 ≤ 4]
Disable interrupts and Class A traps
SFR_range = Extended
DO WHILE ((count) ≠ 0 AND Class_B_trap_condition ≠ TRUE)
Next Instruction
(count) ← (count) - 1
END WHILE
(count) = 0
SFR_range = Standard
Enable interrupts and traps
Causes all SFR or SFR bit accesses via the 'reg', 'bitoff' or 'bitaddr'
addressing modes being made to the Extended SFR space for a specified
number of instructions. During their execution, both standard and PEC
interrupts and class A hardware traps are locked.
The value of op1 defines the length of the effected instruction sequence.
The EXTR instruction must be used carefully (see introductory note).
The EXTR instruction is not available in the SAB 8XC166(W) devices.
E Z
- -
E Not affected.
Z Not affected.
V Not affected.
C Not affected.
N Not affected.
Mnemonic
EXTR #irang2
C166 Family Instruction Set
V C N
- - -
Format
D1 :10##-0
68
Instruction Description
EXTR
Version 1.2, 12.97
Bytes
2