Mitsubishi Electric MELSEC-Q Structured Programming Manual page 20

FXCPU Structured Programming Manual
[Device & Common]
2. FX and FX
3G
Built-in device memory(RAM, EEPROM)
Contact image memory
Input relay (X)
Auxiliary relay (M) State relay (S)
Timer contact, time counting coil, reset coil (T),
counter contact, counting coil and reset coil (C)
Built-in program memory(EEPROM)
Sequence program
File register (D)
Special setting
Extension file register (ER)
*1. Optional memory cannot be connected to FX
18
PLCs
3GC
CPU
[Bit device memory]
Output relay (Y)
Parameter
Comment
The PLC automatically recognizes attachment of
an optional memory
and isolates the built-in program memory.
(The PLC gives the priority to the optional memory.)
Data register (D)
Timer current value register (T)
Counter current value register (C)
Index register (V and Z)
Extension register (R)
Transfer/initialization
by instruction
*1
(when the power is turned ON),
PLCs.
3GC
1.2 Program Memory and Devices
System ROM
[Data memory]
*1
Optional memory
(EEPROM)
Parameter
Sequence program
Comment
File register (D)
Special setting
Extension file register (ER)
1 Device Outline