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6.10.12 h'14 Monitor Settings1
D7
Name
-
Initial
0
Type
R/W
[D7]
Set to "0" surely.
[D6:D4] MONI1_SEL2..0 [DET_TMONI1 Pin Output]
[D6]
[D5]
MONI1_SEL2
MONI1_SEL1
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
[D3]
Set to "0" surely.
[D2:D0]MONI2_SEL2..0 [DET_TMONI2 Pin Output]
[D2]
[D1]
MONI2_SEL2
MONI2_SEL1
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
Table 6-67 Register (h'14)
D6
D5
MONI1_
MONI1_
MONI1_
SEL2
SEL1
0
0
R/W
R/W
[D4]
Signal Name
MONI1_SEL0
0
1
DET_out
Preamble_DET_
0
out
1
RSSI_DET_out
0
NDET_out
1
Status_MONI
0
Un_DET_out
1
PLL_LD
[D0]
Signal Name
MONI2_SEL0
0
1
DET_out
Preamble_DET_
0
out
1
RSSI_DET_out
0
NDET_out
1
Status_MONI
0
Un_DET_out
1
PLL_LD
D4
D3
MONI2_
-
SEL0
SEL2
0
0
R/W
R/W
R/W
-
Low level output
The result of "Signal Detection"
The result of Preamble detection
The result of RSSI detection
The result of Noise detection
TC32306FTG status (Standby, Run) / Battery
Saving
The result of "No Signal Detection"
The result of PLL lock detection
-
Low level output
The result of "Signal Detection"
The result of Preamble detection
The result of RSSI detection
The result of Noise detection
TC32306FTG status (Standby, Run) / Battery
Saving
The result of "No Signal Detection"
The result of PLL lock detection
66
TC32306FTG
D2
D1
D0
MONI2_
MONI2_
SEL1
SEL0
0
0
R/W
R/W
Description
Description
2015-10-01
0
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