Advertisement
6.10.13 h'15 Monitor Settings2
D7
Name
-
Initial
0
Type
R/W
[D7]
Set to "0" surely.
[D6:D4]MONI3_SEL2..0 [DET_TMONI3 Pin Output]
When to select User Test (h'10[D3]USER_TEST = "1" and/or MODE1 pin = "H"), these settings are valid.
[D6]
[D5]
MONI3_SEL2
MONI3_SEL1
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
[D3]
Set to "0" surely.
[D2:D0]MONI4_SEL2..0 [DET_TMONI4 Pin Output]
When to select User Test (h'10[D3]USER_TEST = "1" and/or MODE1 pin = "H"), these settings are valid.
[D2]
[D1]
MONI4_SEL1
MONI4_SEL2
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
Table 6-68 Register (h'15)
D6
D5
MONI3_
MONI3_
MONI3_
SEL2
SEL1
0
0
R/W
R/W
[D4]
MONI3_SEL0
0
BRF_out
1
BRF_in
0
Data_compREF
1
DRSSI_out
0
Noise _out
1
Peak_out
0
-
1
-
[D0]
MONI4_SEL0
0
1
0
1
0
1
0
1
D4
D3
MONI4_
-
SEL0
SEL2
0
0
R/W
R/W
R/W
Signal Name
Bit Rate Filter output signal
Bit Rate Filter input signal
Data Comparator Reference voltage
RSSI output voltage (After the digital to
analog conversion)
Noise detection output voltage
Peak hold voltage of Peak Hold Circuit
Low level output
Low level output
Signal Name
Data_compREF
Data Comparator Reference voltage
BRF_in
Bit Rate Filter input signal
BRF_out
Bit Rate Filter output signal
RSSI output voltage (After the digital to
DRSSI_out
analog conversion)
Noise _out
Noise detection output voltage
Peak_out
Peak hold voltage of Peak Hold Circuit
-
Low level output
-
Low level output
67
TC32306FTG
D2
D1
D0
MONI4_
MONI4_
SEL1
SEL0
0
0
R/W
R/W
Description
Description
2015-10-01
0
Advertisement
