Panasonic DVCPRO50 Service Manual page 37

12-3-2. PLD(FPGA) Version up Method 2 (XILINX)
A. Preparation
ITEM
C PLD WRITER
25pin-25pin Cable
Version Upgrade
Software
Version Upgrade Data
Personal Computer
B. Connection and Preparation
1. Connect the D-sub Cable between CN401(for XILINX) connector of the CPLD WRITER (VFK1590)
and Personal Computer (Printer port).
2. Connect the CPLD WRITER Cable (VFK1590P4) between PLD version up connector on the rear jack
panel and P401 connector of CPLD WRITER. (Refer to Figure 12-3-1.)
3. Turn on the VTR and Personal Computer (Windows mode).
C. Menu Select
1. Target PLD is selected by H08: PLD WR SEL in Other in Service Menu (Refer to Figure 1).
(reference)
The selection by DIP SW also can be done. (refer to INF-17)
VFK1590
VFK1590P4 (VFK1590 standard)
Straight (Male - Female), Length : Within 1meter
XILINX WebPACK ISE Programmer (iMPACT) Software
Please download from the following URL
http://www.xilinx.com/support/download.htm
1. Open this page and then select "WebPACK ISE".
2. Before downloading, registration is required to get ID and Password.
3. After registration, click "Download ISE WebPACK" button.
4. Select "CUSTOM" in "Typical Download Configurations" menu.
5. Check "FPGA Prog."
6. Click Download button.
7. Follow the instruction of next page.
cdf File (Included in VVVSI**** file).
(Copy all files of the VVVSI**** which is included " *.cdf " file to floppy disk)
WINDOWS 95 or 98
SERVICE – MENU : OTHER
NO. H08
H01 STILL LIMIT
H02 LTC OUT SEL
H03 SYSTEM TYPE
H07 DET DISCOUNT
* H08 PLD WR SEL
Figure 1
INF-28
REMARK
in "Custom Design Configuration" page.