HP 10343B Operating Manual page 73

Information Phase. When the SCSI Bus is transferring data and
instructions, the
handshake
lines determine the clock. The I/O line
determines which line, request or acknowledge, marks the data and status
as valid. When the I/O line is asserted, the analyzer is clocked on the
positive edge of the request line that comes from the comparitor into
U17B. When the I/O line is not asserted it is inverted with U10E which
then enables the NAND Gate U17C. This causes the acknowledge line to
generate the analyzer clock.
25na
MIN
ACKNOWLEDGE
mcntraoi
Figure A-4. Request and Acknowledge Timing
Note
The Request and Acknowledge lines in figure A-4 are shown as
they would appear on the HP 10343B. These lines are inverted
from the actual lines in the SCSI bus.
Additional Information
A-12