Hdlc (Rad1P, Rad2P,...) - Motorola MOSCAD 68P02958C00-B User Manual

HDLC (RAD1P, RAD2P,...)

## 260 LEVEL = 0
HDLC hardware/software last status :-
Internal software data (key)
Internal hardware registers
Internal hardware parameters
Current channel port
Reception data lock
Transmission data lock
Reception data header
Reception data tail
Transmission data header
Transmission data tail
Communication signals
Communication buffers
Discard frame counter
Crc error counter
Abort sequence counter
Non matching address counter
Frame retransmit counter
Current reception empty buffers
Current reception ready buffers
Current transmission ready buffers
Current transmission empty buffers
1. Device key address.
2. Address of H-W registers.
3. Address of H-W parameters.
4. The port number.
5. Semaphore of the reception function.
6. Semaphore of the transmission function.
7. Offset in RX_QUEUE (descriptors) for the entry of the new frame that has been received in port.
8. Offset in RX_QUEUE for moving the next frame to upper layers.
9. Offset in TX_QUEUE for moving a new frame to transmission, by upper layers.
10. Offset in TX_QUEUE from where this device takes the next frame for transmission.
11. MTE signal of events that took place.
12. Whether the frame is formatted/unformatted.
13. The number of discarded frames.
14. The number of CRC-error frames.
15. The number of abort-sequence frames.
16. The number of nonmatching address frames.
17. The number of retransmitted frames.
(DATA)
(IREG)
(IRAM)
(HDLC_PORT)
(RXBD_LOCK)
(TXBD_LOCK)
(RXBD_HEAD)
(RXBD_TAIL)
(TXBD_HEAD)
(TXBD_TAIL)
(HDLC_SIGNAL)
(HDLC_TYPE)
(DISFC)
(CRCEC)
(ABTSC)
(NMARC)
(RETRC)
C-19
Software Diagnostics Output
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