Motorola CPCI-6115 Installation And Use Manual page 80

Functional Description
Table 4-3 MV64360 Power-Up Configuration Settings (continued)
Device AD
Bus Signal
AD[18]
AD[19]
AD[21:20]
AD[24:22]
AD[25]
AD[28:26]
AD[31:29]
TxD0[0]
TxD1[0]
TxD2[0]
78
Default
Select Power-Up
Option Setting
Resistor 1
Resistor 0
Resistors 11
Resistors 000
Fixed 0
Resistors 000
PLD 101
Resistor 0
Resistor 0
Resistor 0
CPCI-6115 CompactPCI Single Board Computer Installation and Use (6806800A68D)
Description State of Bit vs. Function
DRAM Clock 0
Select
1
DRAM 0
Address/Control
Delay
1
DRAM control 00
path pipeline
01
select
10
11
DRAM read path 000
control
100
001
111
Gigabit port2 0
Enable
1
PCI_1 DLL 000
control
001
101
110
PCI_0 DLL 000
control
001
101
110
Gigabit port0 0
GMII/PCS Select
1
Gigabit port1 0
GMII/PCS Select
1
Gigabit port2 0
GMII/PCS Select
1
MV64360 System Controller
DRAM is running at a higher
frequency than the core clock
DRAM is running at a same
frequency as the core clock
DRAM address and control
signals toggle on falling edge
of DRAM clock
DRAM address and control
signals toggle on rising edge
of DRAM clock
Reserved
Reserved
Two pipe stages
Three pipe stages
DRAM running in sync mode
DRAM running in async mode
Disable
Enable
DLL disable
Conventional PCI mode at
66MHz
PCI-X mode at 133 MHz
PCI-X mode at 66 MHz
DLL disable
Conventional PCI mode at
66MHz
PCI-X mode at 133 MHz
PCI-X mode at 66 MHz
MII/GMII
PCS
MII/GMII
PCS
MII/GMII
PCS