Boundary Scan Jtag Header; Processor Jtag/Cop Header; Table 3-11 Pmc Connector Pin Assignments , J14/J24; Table 3-12 Boundary Scan Jtag Header Pin Assignments, J16 - Motorola CPCI-6115 Installation And Use Manual

Boundary Scan JTAG Header

Table 3-11 PMC Connector Pin Assignments , J14/J24 (continued)
Pin
51
53
55
57
59
61
63
3.5.10 Boundary Scan JTAG Header
This 2x7 0.1" header is used to provide boundary scan testing of all onboard JTAG devices in
a single scan chain. The pin assignments for this header are as follows:
J16 pin 12 is grounded in the JTAG test cable. When the cable is attached, the CPU_BSCAN_L
signal is grounded, which automatically configures the boundary scan chain to include the CPU.

Table 3-12 Boundary Scan JTAG Header Pin Assignments, J16

Pin
1
3
5
7
9
11
13
3.5.11

Processor JTAG/COP Header

The processor has a 2x8 0.1" JTAG/COP header for use with third party MPC745x JTAG/COP
controllers. The pin assignments for this header are as follows:
With no JTAG cable attached to J16, the CPU JTAG signals are routed to J17 as shown.

Table 3-13 Processor JTAG/COP Header Pin Assignments, J17

Pin
1
3
5
7
CPCI-6115 CompactPCI Single Board Computer Installation and Use (6806800A68D)
PMCIO51
PMCIO53
PMCIO55
PMCIO57
PMCIO59
PMCIO61
PMCIO63
TRST_L
TDO
TDI
TMS
TCK
NC
AUTOWR_L
Signal
CPUTDO
CPUTDI
QREQ_L
CPUTCK
Controls, LEDs, and Connectors
J14/J24
PMCIO52
PMCIO54
PMCIO56
PMCIO58
PMCIO60
PMCIO62
PMCIO64
Signal
GND
GND
GND
GND
GND
CPU_BSCAN_L
GND
Pin
2
4
6
8
Pin
52
54
56
58
60
62
64
Pin
2
4
6
8
10
12
14
Signal
QACK_L
CPUTRST_L
+1.8 V
CHKSTPI_L
63