Processor Memory Map - Motorola CPCI-6115 Installation And Use Manual

Memory Maps
Table 8-1 Default Processor Memory Map (continued)
Processor Address
Start
1C80 0000
1D00 0000
1E00 0000
2000 0000
2200 0000
2400 0000
2600 0000
2800 0000
2A00 0000
4200 0000
4304 0000
F100 0000
F101 0000
F200 0000
F400 0000
F600 0000
F800 0000
FF00 0000
FF80 0000
1.Set by configuration resistors.
2.This may be Flash Bank A or B, depending on the setting of the Flash Boot Bank Select
jumper.
8.2.2

Processor Memory Map

The following table describes a suggested Memory Map from the point of view of the Processor.
The beginning of PCI Memory Space is determined by the end of DRAM rounded up to the
nearest 256 MB boundary. For example, if memory was 1G on the baseboard and 192 MB on
a mezzanine, the beginning of PCI memory would be rounded up to address 0x50000000 (1
GB + 256 MB).
126
End Size
1CFF FFFF 8 MB
1DFF FFFF 16 MB
1FFF FFFF 32 MB
21FF FFFF 32 MB
23FF FFFF 32 MB
25FF FFFF 32 MB
27FF FFFF 32 MB
29FF FFFF 32 MB
41FF FFFF 384 MB
4303 FFFF 256 KB
F0FF FFFF 2783 MB
F100 FFFF 64 KB Aliased
F1FF FFFF 16 MB-64 KB
F3FF FFFF 32 MB
F5FF FFFF 32 MB
F7FF FFFF 32 MB
FEFF FFFF 112 MB
FF7F FFFF 8 MB
FFFF FFFF 8 MB
CPCI-6115 CompactPCI Single Board Computer Installation and Use (6806800A68D)
Processor Memory Map
Definition
Device CS1*
Device CS2*
Unassigned
PCI Bus 1 I/O
PCI Bus 1 Memory Space 0
PCI Bus 1 Memory Space 1
PCI Bus 1 Memory Space 2
PCI Bus 1 Memory Space 3
Unassigned
MV64360 Integrated SRAM
Unassigned
Internal Registers
Unassigned
PCI Bus 0 Memory Space 1
PCI Bus 0 Memory Space 2
PCI Bus 0 Memory Space 3
Unassigned
Device CS3*
Boot Flash
1
2