Sources Of Reset; Machine Check; Soft Reset; Smi - Motorola CPCI-6115 Installation And Use Manual

Compactpci single board computer
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Functional Description
3. The interrupting device is addressed from the MC64360 Device Bus.
4. The interrupting device is addressed from the MV64360 I
5. The interrupting device is addressed from the MV64360 PCI Bus 1.0 through the 21555
PCI-to-PCI bridge.
6. The DS1621 Digital Thermometer and Thermostat provides 9-bit temperature readings
which indicate the temperature of the device. The thermal alarm output, TOUT, is active
when the temperature of the device exceeds a user defined temperature TH.
4.4.2.2

Sources of Reset

The CPCI-6115 SBC provides reset control from a programmable logic device (PLD) to provide
maximum flexibility of the circuit design. A hard reset is defined as a reset of all onboard circuitry
including the PowerPC hard reset and reset of all onboard peripheral devices. A soft reset is
defined as a reset of the PowerPC. The CPCI-6115 has these listed sources of reset:
Power-On/undervoltage reset
Front panel reset switch
CompactPCI RESET# signal
MV64360 Watchdog Timer
M48T37V Watchdog Timer
System Control Register bit
The Processor RiscWatch HRESET# signal can cause a CPU-only reset.
4.4.2.3

Machine Check

The processor MCP# signal is pulled high (inactive).
4.4.2.4

Soft Reset

The processor SRESET# signal is connected only to the RiscWatch header.
4.4.2.5

SMI

The processor SMI# is pulled high (inactive).
4.4.2.6

Other Software Considerations

The following issues also apply to this board.
The MV64360 supports a big endian CPU bus. The endianess of the local memory (DDR and
SRAM) is also big endian. Data transferred to/from the local memory is NEVER swapped. The
internal registers of the MV64360 are always programmed in Little Endian. On a CPU access
to the internal registers, data is byte swapped.
Data swapping on a CPU access to the PCI is controlled via PCISwap bits of each PCI Low
Address register. This configurable setting allows a CPU access to PCI agents with a different
endianess convention.
86
CPCI-6115 CompactPCI Single Board Computer Installation and Use (6806800A68D)
Interrupt Handling
2
C Bus.

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