Stand-Alone Operation Select Header; Flash Boot Bank Select Header; Table 3-14 Stand-Alone Operation Select Header Pin Assignments, J9; Table 3-15 Flash Boot Bank Select Header Pin Assignments, J10 - Motorola CPCI-6115 Installation And Use Manual

Controls, LEDs, and Connectors
Table 3-13 Processor JTAG/COP Header Pin Assignments, J17 (continued)
Pin
9
11
13
15
3.5.12

Stand-Alone Operation Select Header

There is a 0.1", 2-pin header located on the CPCI-6115 to control standalone operation.
Standalone operation is selected when the jumper is installed and normal operation occurs
when the jumper is not installed. The pin assignments for this header are as follows:

Table 3-14 Stand-Alone Operation Select Header Pin Assignments, J9

Pin
1
2
3.5.13

Flash Boot Bank Select Header

There is a 0.1", 3-pin header on the CPCI-6115 to select the boot flash bank. No jumper or a
jumper installed between pins 1 and 2 will route the BOOTCS* signal to Flash Bank A and
device CS0* to Flash Bank B. A jumper installed between pins 2 and 3 routes BOOTCS* to
Flash Bank B and CS0* to Flash Bank A. The pin assignments for this header are as follows:

Table 3-15 Flash Boot Bank Select Header Pin Assignments, J10

Pin
1
2
3
64
Signal
CPUTMS
SRESET_L
CPURST_L
CHKSTPO_L
Signal
STAND_ALONE_L
GND
Signal
GND
BANK_SEL
+3.3 V
CPCI-6115 CompactPCI Single Board Computer Installation and Use (6806800A68D)
Stand-Alone Operation Select Header
Pin Signal
10 NC
12 NC
14 KEY (no pin)
16 GND
Function
1-2 Boot from Bank A
2-3 Boot from Bank B