Hardware Status After Reset - NEC switch User Manual

Note 1
Program counter (PC)
Stack pointer (SP)
Program status word (PSW)
RAM
Port (P0 to P2, P4) output latch
Port mode register (PM0 to PM2, PM4)
Pull-up resistor option register (PU0)
Port output mode register (POM0, POM1)
Processor clock control register (PCC)
Oscillation stabilization time select register (OSTS)
8-bit timer/event counter
Watchdog timer
USB function
Notes 1. During reset input and oscillation stabilization time wait, only the PC contents among the hardware
statuses become undefined.
All other hardware remains unchanged after reset.
2. The post-reset values are retained in the standby mode.
188
CHAPTER 13 RESET FUNCTION
Table 13-1. Hardware Status After Reset (1/2)
Hardware
Data memory
General-purpose register
Timer counter (TM00, TM01)
Compare register (CR00, CR01)
Mode control register (TMC00, TMC01)
Timer clock select register (TCL2)
Mode register (WDTM)
Transmit receive pointer (USBPOW)
Receive token PID (USBRTP)
Receive token address (USBRAL, USBRAH)
Receive data PID (USBRD)
Receive data address (USBR0 to USBR7)
Transmit data PID bank (USBTD0, USBTD1)
Transmit data bank address (USBT00 to USBT07,
USBT10 to USBT17)
Data/handshake packet receive byte number counter
(DRXCON)
User's Manual U12978EJ3V0UD
Status After Reset
The contents of reset
vector tables (0000H
and 0001H) are set.
Undefined
02H
Note 2
Undefined
Note 2
Undefined
00H
FFH
00H
00H
02H
04H
00H
Undefined
00H
00H
00H
00H
00H
00H
00H
Undefined
Undefined
Undefined
18H