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(3) Port output mode registers (POM0 and POM1)
The port output mode registers (POM0 and POM1) are used to switch from CMOS output to N-ch open-drain
output for port 0, port 1, pin P25, and pin P26.
Set POM0 and POM1 with a 1-bit or 8-bit memory manipulation instruction.
RESET input sets P0M0 and POM1 to 00H.
Symbol
7
6
POM0
0
0
POM0m
0
CMOS output
1
N-ch open-drain output
Note POM0 selects the output mode for a port in 8-bit units.
Caution
Bits 2 to 7 must be set to 0.
Symbol
7
<6>
POM1
0
POM126 POM125
POM12n
0
CMOS output
1
N-ch open-drain output
Note POM1 selects the output mode for P25 or P26 in 1-bit units.
Caution
Bits 0 to 4 and 7 must be set to 0.
CHAPTER 4
Figure 4-13. Format of Port Output Mode Register 0
5
4
3
2
<1>
0
0
0
0
POM01POM00
Figure 4-14. Format of Port Output Mode Register 1
<5>
4
3
2
0
0
0
Output mode selection for bit n of port 2
User's Manual U12978EJ3V0UD
PORT FUNCTIONS
<0>
Address
After reset
FF30H
Pm output mode selection
(m = 0, 1)
1
0
Address
After reset
0
0
FF31H
(n = 5, 6)
R/W
00H
R/W
Note
R/W
00H
R/W
Note
71
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