NEC switch User Manual page 203

Mnemonic Operands
MOVW rp,#word
AX,saddrp
saddrp,AX
Note
AX,rp
Note
rp,AX
Note
XCHW AX,rp
ADD A,#byte
saddr,#byte
A,r
A,saddr
A,!addr16
A,[HL]
A,[HL+byte]
ADDC A,#byte
saddr,#byte
A,r
A,saddr
A,!addr16
A,[HL]
A,[HL+byte]
SUB A,#byte
saddr,#byte
A,r
A,saddr
A,!addr16
A,[HL]
A,[HL+byte]
Note Only when rp = BC, DE, or HL.
Remark One instruction clock cycle is one CPU clock cycle (f
register (PCC).
CHAPTER 15 INSTRUCTION SET
Bytes Clocks
rp ← word
3 6
AX ← (saddrp)
2 6
(saddrp) ← AX
2 8
AX ← rp
1 4
rp ← AX
1 4
AX ↔ rp
1 8
A,CY ← A+byte
2 4
(saddr),CY ← (saddr) + byte
3 6
A,CY ← A+r
2 4
A,CY ← A+(saddr)
2 4
A,CY ← A+(addr16)
3 8
A,CY ← A+(HL)
1 6
A,CY ← A+(HL+byte)
2 6
A,CY ← A+byte+CY
2 4
(saddr),CY ← (saddr)+byte+CY
3 6
A,CY ← A+r+CY
2 4
A,CY ← A+(saddr)+CY
2 4
A,CY ← A+(addr16)+CY
3 8
A,CY ← A+(HL)+CY
1 6
A,CY ← A+(HL+byte)+CY
2 6
A,CY ← A−byte
2 4
(saddr), CY ← (saddr)− byte
3 6
A,CY ← A−r
2 4
A,CY ← A−(saddr)
2 4
A,CY ← A−(addr16)
3 8
A,CY ← A−(HL)
1 6
A,CY ← A−(HL+byte)
2 6
User's Manual U12978EJ3V0UD
Operation
) selected by the processor clock control
CPU
Flag
Z AC CY
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