Mitsubishi Electric MELSEC iQ-R Series Programming Manual page 907

■8-bit conversion mode (while SM772 is ON)
With regard to (n) data points starting from (s), the addition data and horizontal parity data of only low-order 8 bits are stored
to (d) and (d)+1 respectively.
Ex.
When (n)=6
<Calculation of addition data value>
In 8-bit conversion mode, addition data is determined by adding 6 bytes in the following shaded portion. The addition data is
thus determined as "03B2H", and therefore "03B2H" is stored in the device specified by (d).
Decimal Hexadecimal
Upper
D0 24932 61H
D1 4219 10H
D2 -1333 FAH
D3 -1 FFH
D4 32761 7FH
D5 10000 27H
<Calculation of horizontal parity value>
In 8-bit conversion mode, the above shaded portion becomes the horizontal parity calculation target. The number of ON (1)
bits is calculated to determine the parity value which becomes ON (1) when the number of ON (1) bits is finally odd or OFF (0)
when it is finally even. The horizontal parity value is stored in the device specified by (d)+1.
In the following table, C2H is stored in the device specified by (d)+1.
Bit/horizontal parity value
Lower 8 bits of D0
Lower 8 bits of D1
Lower 8 bits of D2
Lower 8 bits of D3
Lower 8 bits of D4
Lower 8 bits of D5
Horizontal parity value
Operation error
There is no operation error.
Lower
64H 64H 64H
7BH 7BH 7BH
CBH CBH CBH
FFH FFH FFH
F9H F9H F9H
10H 10H 10H
b7 b6 b5 b4
0 1 1 0
0 1 1 1
1 1 0 0
1 1 1 1
1 1 1 1
0 0 0 1
1 1 0 0
b3 b2 b1 b0
0 1 0 0
1 0 1 1
1 0 1 1
1 1 1 1
1 0 0 1
0 0 0 0
0 0 1 0
7 APPLICATION INSTRUCTIONS
7.19 Check Code Instructions
7
Value
64H
7BH
CBH
FFH
F9H
10H
C2H
905