Mitsubishi Electric Melsec iQ-R Series User Manual page 145

CH1 HART device information (PV range engineering unit)
An engineering unit is stored within the setting range of the PV value of the used HART-enabled device. A value defined by
the standard specifications of the HART is stored for each engineering unit. For details on the stored values, refer to the
standard specifications of the HART or the manual of the used HART-enabled device.
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory name
CH HART device information (PV range
engineering unit)
CH1 HART device information (PV upper range value)
The PV upper range value of the used HART-enabled device is stored in 32-bit floating points (single-precision real number).
A value corresponding to 20mA in the set engineering unit of the PV value is stored.
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory name
CH HART device information (PV upper range
value)
CH1 HART device information (PV lower range value)
The PV lower range value of the used HART-enabled device is stored in 32-bit floating points (single-precision real number).
A value corresponding to 4mA in the set engineering unit of the PV value is stored.
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory name
CH HART device information (PV lower range
value)
CH1 HART device information (PV damping value)
The damping constant of the PV value of the used HART-enabled device is stored in 32-bit floating points (single-precision
real number). The unit of a stored value is second.
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory name
CH HART device information (PV damping
value)
CH1 CH2 CH3
2559 2659 2759
CH1 CH2 CH3
2560 2660 2760
2561 2661 2761
CH1 CH2 CH3
2562 2662 2762
2563 2663 2763
CH1 CH2 CH3
2564 2664 2764
2565 2665 2765
CH4 CH5 CH6
2859 2959 3059
CH4 CH5 CH6
2860 2960 3060
2861 2961 3061
CH4 CH5 CH6
2862 2962 3062
2863 2963 3063
CH4 CH5 CH6
2864 2964 3064
2865 2965 3065
Appendix 3 Buffer Memory Areas
CH7 CH8
3159 3259
CH7 CH8
3160 3260
3161 3261
A
CH7 CH8
3162 3262
3163 3263
CH7 CH8
3164 3264
3165 3265
APPX
143