Huawei MU609 Hardware Manual page 35

HUAWEI MU609 HSPA LGA Module
Hardware Guide
According to USB protocol, for bus timing or electrical characteristics of MU609 USB
signal, please refer to the chapter 7.3.2 of
Figure 3-13 Recommended circuit of USB interface
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Issue 04 (2016-12-12)
USB_DM and USB_DP are required to control the differential impedance –90 ohm (±10%).
The length of the gap between USB_DM and USB_DP should not exceed 5 mil.
The USB differential signal trace must be as short as possible, and laid out away from
high-speed clock signals and other periodic signals as far as possible.
Minimize through-holes and turning angles on the USB signal trace to reduce signal
reflection and impedance change.
Do not route the USB signal trace under the following components: crystal, oscillator, clock
circuit, electromagnetic component, and IC that uses or generates clocks.
Avoid stubs on the USB signal trace because stubs generate reflection and affect the signal
quality.
Route the USB signal trace on a complete reference plane (GND) and avoid crossing
inter-board gaps because inter-board gaps cause a large reflow channel area and increase
inductance and radiation. In addition, avoid signal traces on different layers.
The USB signal trace must be far away from core logical components because the high
current pulse generated during the state transitions process of core components may
impose interference on signals.
The USB signal trace must be far away from board edges with a minimum distance of 20 × h
(h indicates the vertical distance between the trace and the reference layer) to avoid signal
radiation.
C1 and C2 are ready for dealing with filter differential mode interference and C3 is ready for
dealing with filter common mode interference. You can choose the value of the C1, C2 and
C3 according to the actual PCB which is integrated 30 mm × 30 mm LGA Module
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Description of the Application Interfaces
Universal Serial Bus Specification 2.0.
35