Jtag Interface - Huawei MU609 Hardware Manual

HUAWEI MU609 HSPA LGA Module
Hardware Guide
Table 3-11 Signals on the GPIO interface
Pin
PIN No.
Name
51, 55, 105, GPIO
109 and
113

3.9 JTAG Interface

The MU609 module provides Joint Test Action Group (JTAG) interface. Table 3-12
shows the signals on the JTAG interface. It is recommended that route out the 9 pins
as test points on the DTE for tracing and debugging.
Table 3-12 Signals on the JTAG interface
PIN
Pin Name
No.
30 JTAG_TMS
36 JTAG_TRST_N
42 JTAG_TCK
72 JTAG_TDO
87 JTAG_TDI
93 JTAG_RTCK
14 PS_HOLD
100 RESIN_N
32 VCC_EXT1
Issue 04 (2016-12-12)
Pad
Description
Type
I/O General Purpose I/O
pins. The function of
these pins has not
been defined.
Pad
Description
Type
I JTAG test mode
selection
I JTAG test reset
I JTAG test clock
O JTAG test data
output
I JTAG test serial
data input
O JTAG test clock
return signal
I Power supply hold
signal to PMU
I Reset module.
PO 1.8 V power output
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Copyright © Huawei Technologies Co., Ltd.
Description of the Application Interfaces
Parameter Min. (V)
V 1.2
IH
–0.3
V
IL
V 1.35
OH
V 0
OL
Parameter Min. (V)
V 1.2
IH
–0.3
V
IL
V 1.2
IH
–0.3
V
IL
V 1.2
IH
–0.3
V
IL
V 1.35
OH
V 0
OL
V 1.2
IH
–0.3
V
IL
V 1.35
OH
V 0
OL
V 1.2
IH
–0.3
V
IL
V 1.2
IH
–0.3
V
IL
- -
Typ. (V) Max. (V)
1.8 2.1
- 0.5
- 1.8
- 0.45
Typ. (V) Max. (V)
1.8 2.1
- 0.5
1.8 2.1
- 0.5
1.8 2.1
- 0.5
- 1.8
- 0.45
1.8 2.1
- 0.5
- 1.8
- 0.45
1.8 2.1
- 0.5
1.8 2.1
- 0.5
1.8 -
38