Sony CXD5602 User Manual page 9

CXD5602 User Manual
Figure APP-107 Input-Output Addresses of Address Converter ........................................................................... 919
Figure APP-108 Address Conversion Operation Scheme ..................................................................................... 920
Figure APP-109 Example of Address Conversion: Conversion of Bit Assignment for ADSP0 ........................... 923
Figure APP-110 Example of Address Conversion: Conversion Address Map for ADSP0 and ADSP1 ............... 923
Figure APP-111 Success Case 1 of Exclusive Access ........................................................................................... 925
Figure APP-112 Success Case 2 of Exclusive Access ........................................................................................... 925
Figure APP-113 Failure Case 1 of Exclusive Access ............................................................................................ 926
Figure APP-114 Failure Case 2 of Exclusive Access ............................................................................................ 926
Figure APP-115 Failure Case 3 of Exclusive Access ............................................................................................ 926
Figure SYSIOP Clock and Reset Control-116 SYSIOP Clock Configuration Diagram ....................................... 936
Figure SYSIOP Clock and Reset Control-117 SYSIOP Reset Configuration Diagram ........................................ 950
Figure ADC-118 Block Diagram ADCIF module and around ADC macro circuits ............................................. 957
Figure ADC-119 Memory Map inside the ADCIF ................................................................................................ 958
Figure ADC-120 Schematic Diagram of the Clock Control .................................................................................. 960
Figure ADC-121 Data Flow of the ADC ............................................................................................................... 962
Figure ADC-122 HPADC Gain Control Overview ............................................................................................... 964
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