Hitachi AP1 Data Book page 204

4-bit single-chip microcomputer
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LCD-IV----------------------------------------------------~--------------
• LIQUID CRYSTAL DISPLAY
• Liquid Crystal Display Circuit
The LCD-IV can directly drive the liquid crystal display
panel of static, 1/2 duty factor, 1/3 duty factor and 1/4 duty
factor.
R so , Rn
t;
W
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W
CI)
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~
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~
-J
CL
CI)
o
DISPLAY
COUNTER &
CONTROL
CIRCUIT
RIIO
X,Y
C)
z
~
1--'---.l\.lw
I - - - r - - - - . / I
~
o
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The LCD-IV has 4 common signal terminals and 32 seg·
ment signal terminals. Further,
if
liquid crystal driver LSI
(H044100H) is connected to the LCD-IV, up to 96 segment
signal terminals can be extended externally. Thus, in addition
to the internal 32 terminals, total 128 segment signal terminals
can be driven.
51 BUS
52 BUS
RAM
SERIAL DATA
ALTERNATING
SIGNAL (M)
SERIAL SEGMENT DATA
(D)
Figure 25 Liquid Crystal Display Circuit Block Diagram
Display is automatically executed by writing segment data
into RAM for LCD. The RAM reads segment data bit by bit
sequentially every one instruction cycle upon receiving address
signal from the display counter and the control circuit. Every
time common signal is scanned, the RAM reads 128-segment
data (SEG
t
to SEG
t
28),
which is correspond to common signal
selected at the next time. Scan of common signal is executed
every 256-instruction cycle. Therefore, the data which is cor·
respond to 128-segment is read twice at the same time. The
serial data read is converted to parallel data by the shift register
and latch, converted to LCD drive signal by the liqUid crystal
driver and the outputted from a segment terminal. 32-segment
(SEGI to SEG32) out of 128.segment serial data is used within
the LCD·IV, and the rest (96-segment) is outputted to liquid
crystal driver LSI HD44100H which is connected to the LCD·
IV and is converted to LCD drive signal in the HD44100H at
the time of designation of with liquid crystal segment output
extension. Cycle of the latch clock is 256-instruction cycle in
the LCD-IV. In the case of dynamic drive, data at the common
side changes synchronously with the latch clock. These display
operations are all executed regardless of program.
202

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