Hitachi AP1 Data Book page 253

---------------------------------------------------------------HMCS404C
• ROM ADDRESSING MODE AND P INSTRUCTION
The MCV has four kinds of ROM addressing modes as shown
in Fig. 22.
• Direct Addressing Mode
The program can branch to any addresses in the ROM
memory space by using JMPL, BRL or CALL instruction.
These instruction replace 14-bit program counter (PC n to
PC o ) with 14-bit immediate data.
• Current Page Addressing Mode
MCV has 8 pages of ROM(256 words in each page).The pro-
gram branches to the address in the same page using BR instruc-
tion. This instruction replace the low-order eight bits of pro-
(JMPL)
(BRL)
(CALL)
Instruction 1st Word
gram counter (pC
7
to PC o ) with 8-bit immediate data.
• Zero Page Addressing Mode
The program branches to the zero page subroutine area,
which is located on the address from $0000 to $003F, using
CAL instruction. When CAL instruction is executed, 6-bit
immediate data is placed in low-order six bits of program
counter (PC s to PC o ) and '.'O's" are placed in high-order
ei~lt
bits (pCl3 to PC e ). The branch destination by BR instruction
on the broundary between pages is given in Fig. 24.
• Table Data Addressing
The program branches to the address determined by the
contents of the 4-bit immediate data, accumulator and B regis-
ter, using TBR instruction.
Instruction 2nd Word
(a) Direct Addressing
(TBR)
(BR)
Program Counter
PC" PC
12
PC
II
PC •• PC. PC,
(b) Current Page Addressing
(e) Zero Page Addressing
Instruction
OP Code
Program Counter
(d) Table Data Addressing
Fig. 22 ROM Addressing Mode
251
Instruction
Instruction