Hitachi AP1 Data Book page 81

--------------------------------------------------------HMCS45C,HMCS45CL
Group Mnemonic Function
Status
MNEI i
M* i
NZ
YNEI i
Y *
i
NZ
ANEM
A*M
NZ
Compare Instruction BNEM
B*M
NZ
ALEI i
A ~
i
NB
ALEM A~M
NB
BLEM
B~M
NB
SEM n
"1"
~
M (n)
RAM Bit Manipulation
REM n "0"
~
M (n)
Instruction
TM n Test
M (n) M(n)
BR a
Branch on Status 1
1
CAL a Subroutine Jump on Status 1
1
ROM Address
LPU u Load Program Counter Upper on Status 1
Instruction
TBR p Table Branch
RTN Return from Subroutine
SEIE "1" ~ liE
SEIFO "1" ~ IFO
SEIF1
"1" ~ IF1
SETF
"1" ~ TF
SECF
"1" ~ CF
REIE
"0" ~ liE
REIFO
"0" ~ IFO
REIF1 "0" ~ IF1
RETF
"0" ~ TF
Interrupt Instruction RECF "0" ~ CF
TIO Test INTo INTo
TI1 Test INT,
INT,
TIFO Test IFO IFO
TIF1 Test IF1
IF1
TTF Test TF
TF
LTI i i ~ Timer
ICol;lnter
LTA A ~ Timer
ICounter
LAT
Timer
ICounter
~
A
RTNI Return Interrupt
SED "1" ~ D (Y)
RED "0" ~ D (Y)
TD
Test
D (Y)
D(Y)
SEDD n "1" ~ D (n)
Input/Output REDD n
"0"
~
D (n)
Instruction LAR p R(p) ~A
LBR p
R(p) ~ B
LRA p A~ R(p)
LRB p B ~ R(p)
Pp Pattern Generation
NOP No Operation
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