Sharp SL-5500 Service Manual page 26

2-11. SYNCHRONUS BUCK REGULATOR (SP6650)
(1) BLOCK DIAGRAM
V
IN
+
REF
-
V
OUT
FB
SHDN
Ref
Block
I
LIM
GND
(2) PIN CONFIGURATION
PV
1
IN
V
2
IN
SP 6650
BLON 3
10 Pin MSOP
I
4
LIM
SHDN 5
(3) PIN DESCRIPTION
PIN PIN
No. NAME
1 PVIN Input voltage power pin. Inductor charging current
passes through this pin.
2 VIN Internal supply voltage. Control circuitry powered
from this pin.
3 BLON Open drain battery low output. VIN below battery
low threshold pulls this node to ground. VIN above
threshold, this node is open.
4 ILIM Inductor current limit programming pin. Tie pin to
VIN for 0.95A peak inductor current limit. Tie pin to
ground for 0.5A peak inductor current limit. TTL
input threshold.
Min
T
OFF
V
IN
Min
T
ON
C
+
REF / 2
C
-
UVLO
TSD
REF
REF / 2
I LIM / M
+
REF
C
V
IN
-
UVLO
10
LX
9 PGND
8
GND
V
7
OUT
6 FB
DESCRIPTION
SL-5500 HARDWARE DESCRIPTION
D
Q
Q
CLR
SHDN
PIN PIN
No. NAME
5 SHDN Shutdown control input. Tie to VIN for normal oper-
ation, tie to ground for shutdown. TTL input thresh-
old.
6 FB External feedback network input connection. Con-
nect a resistor from FB to ground and FB to VOUT
to control the output voltage externally. This pin
regulates to the internal bandgap reference volt-
age of 1.25V. Tie FB to ground to use the internal
divider for a preset output voltage of 3.3V.
7 VOUT Output voltage sense pin. Used for internal feed-
back divider and timing circuit.
8 GND Internal ground pin. Control circuitry returns cur-
rent to this pin.
9 PGND Power ground pin. Synchronous rectifier current
returns through this pin.
10 LX Inductor switching node. Inductor tied between this
pin and the output capacitor to create regulated
output voltage.
– 25 –
PC-UM10M
PV
IN
M 1
+
C
-
OVERCURRENT
I LIM / M
+
C
-
V
IN
DESCRIPTION
LX
PGND
BLON